AD1865 the best DAC

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May I ask you to export/save your file in MS10, as I don't have MS11. Thanks!

Regarding the suggestion of shifting FSYNC, maybe I was wrong. I think an even better solution would be to shift SDATA in this case as well. For I2S to 18 bit EIAJ instead of 19clck shift only 13 would be enough (course keeping those 11us delay).
I bought a bunch of HC164 and I will start playing with them soon :)
 
May I ask you to export/save your file in MS10, as I don't have MS11. Thanks!

I bought a bunch of HC164 and I will start playing with them soon :)

Sorry, MS11 is not backward compatible with MS10. Have fun with these HC164 :up:

So I don't have to lose sleep about it ?

D.

If you still interested, I looked wat's happening with my CS8414 error reporting. Well, it's showing no lock error if I connect spdif after powering CS up. And this is normal, as no reset is implemented. So all errors from power up are latched and stays there. Simple reset implementation could be done as per this link. Also VERF pin is better option for data status reporting LED.

As I had time to play with this design couple improvements was made. First I removed all TL431, as they are just an extra source of noise. 10ohm resistor shunted with good quality (low esr) 220uf and 0,1uF is adequate to keep digital 5V supply bus from Salas reg clean. Second one, was made after reading this. I was getting bored, so decided to try some silly stuff, as bypassing spdif isolation transformer and connecting directly to CS RX pins with no decoupling caps or line matching resistors. That is a terrible thing to do by all means, from electronics engineering point of view, as S22083 (also tested PE-65612) are working marvelous. No signal degradation could be seen with scope (good spectral analyzer of-course should show some). But wait, damn... it's so audible ! :eek: Couldn't agree more with lampizator's author - "it is a real thick blanket being removed". So I was getting excited by then, and gone for more silly stuff. Made output buffer for my sound card with some HC02, and feeded 5V TLL SPDIF signal (just 1 decoupling cap) directly to CS with 1.5m cox cable. Signal doesnt look good, as you would imagine. It looks like some dumb person put 1.5m wire for 2.8 Mhz signal actualy :) But what can I say.... sounds maybe even better :D
If someone would ask me to came up with good technical explanation, why making things worse, in this case makes sound better, I would probably had hard time with my answers :scratch1:
So now this is by far best nos dac that I heard in a long time. It's time for me to reword it with good tube output and clean I2S. This dac deserves it.
 
I would suggest one more mod (I will implement this way) around the CS8414:
use SMD 68nF and 470R for its filter by soldering directly to the CS pins (top layer) and remove (pull out) the Filt pin from the adapter socket. Also use 0.1uF SMD decoupling caps soldered directly to the top layer pins and leave only the 47uF on the board. For more explanation see CS8416 manual (PLL Filter, of course Crip is not needed for CS8414).

By the way, I really don't understand why the DacEnd2 project uses CS8414 and not CS8416 as it can be bought from several electronic shops, not some fake Chinese parts, it can be configured in Hardware mode to output same format and its jitter outperforms CS8414 (AN339REV1.pdf) :confused:

Anyway, if I'm not lucky with my CS8414 I will try this.
 
I would suggest one more mod (I will implement this way) around the CS8414:
use SMD 68nF and 470R for its filter by soldering directly to the CS pins (top layer) and remove (pull out) the Filt pin from the adapter socket. Also use 0.1uF SMD decoupling caps soldered directly to the top layer pins and leave only the 47uF on the board. For more explanation see CS8416 manual (PLL Filter, of course Crip is not needed for CS8414).

I'm using my own board and layout. I have CS, Oscons with 0.1 and filter RC on adapter board, as close to IC pins as possible. It's just ABC of HF electronics.

By the way, I really don't understand why the DacEnd2 project uses CS8414 and not CS8416 as it can be bought from several electronic shops, not some fake Chinese parts, it can be configured in Hardware mode to output same format and its jitter outperforms CS8414 (AN339REV1.pdf) :confused:

Anyway, if I'm not lucky with my CS8414 I will try this.

I think Audiodesign found it more musical then 8416. I don't have spare 8416 laying around to evaluate both side by side, so no comments there. I ordered mine 8414 from ELFA -- Elektronikdistributör i norra Europa couple months ago. Even though search didn't find them as in stock, they had 6 pcs in stock somehow. But the price was ouch... .:faint:

Anyhow I have no more interest in playing games with this spdif nonsense. As I found out long time ago, clean I2S is a way to go, period.
 
About AN339REV1.pdf

As I understand this jitter values are given as CS8414 or 16 own jitter and nothing is written about if input SPDIF signals had already big jitter.
Will CS8414 or 16 suppress SPDIF jitter or they will follow the jittered frequency from SPDIF? Is there big difference to use 8414 or 8416 if SPDIF had big jitter?
 
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As I understand this jitter values are given as CS8414 or 16 own jitter and nothing is written about if input SPDIF signals had already big jitter.

I agree, this AN is only evaluating 8414 vs. 16 own jitter performance.

Will CS8414 or 16 suppress SPDIF jitter or they will follow the jittered frequency from SPDIF? Is there big difference to use 8414 or 8416 if SPDIF had big jitter?

Good question, I would suspect that 8414 is handling jitter rejection better.
 
sampler posted

As I had time to play with this design couple improvements was made. First I removed all TL431, as they are just an extra source of noise. 10ohm resistor shunted with good quality (low esr) 220uf and 0,1uF is adequate to keep digital 5V supply bus from Salas reg clean. Second one, was made after reading this. I was getting bored, so decided to try some silly stuff, as bypassing spdif isolation transformer and connecting directly to CS RX pins with no decoupling caps or line matching resistors. That is a terrible thing to do by all means, from electronics engineering point of view, as S22083 (also tested PE-65612) are working marvelous. No signal degradation could be seen with scope (good spectral analyzer of-course should show some). But wait, damn... it's so audible ! Couldn't agree more with lampizator's author - "it is a real thick blanket being removed"

I have run my digital signal directly to the CS chip for about a month now. Couldn't agree with you more.

Is removing the TL431 audible?

I would like to upgrade the HV supply next - I am looking forward to the HV shunt supply. Anybody using this?


I go back and forth on using the 6H6P family (Olivers Tubizator implementation of the Lampizator set-up) and the E82CC. Both are very good.

Best

Bob
 
About evaluating 8414 vs. 16 you are probably right :eek: I thought that something newer must be better.

I downloaded an evaluation MS11 and played with sampler's files (thanks!).
By shifting SDATA with 13 clcks and using the second flip-flop from HC74 I reduced the component count to only 4.

(later edit: ) I realized that I need to shift 14clks if I use the second flip-flop for the LR/LL.

Some questions to the experienced ones:
Is it OK to use an 74HC157 to switch between two I2S sources?
Does the propagation delay of this IC matter for the speed we use it?
Is the propagation delay the same for all bits of data or it might differ from bit to bit?

Thanks.
Zsolt
 

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Is it OK to use an 74HC157 to switch between two I2S sources?
Does the propagation delay of this IC matter for the speed we use it?
Is the propagation delay the same for all bits of data or it might differ from bit to bit?
Zsolt

Delay is always the same as long as the operational conditions stays stable (t, Vs). HC157 should be ok for source select, it's 10ns delay is not trivial, even using 96khz sampling, when bit clock is 6.1mhz, so 160ns window. But I would still compensate it with some HC540 buffers, if it was up to me.
As always, reclocking after all this logic stuff could be implemented, and no more worries about any non matching delays.

Is removing the TL431 audible?

I would like to upgrade the HV supply next - I am looking forward to the HV shunt supply. Anybody using this?

Duno about TL431 audibility, it's subjective. At least not as much, as in direct SPDIF connection. But they are oscillating for some 10mV in Mhz region, so this is not helping for sure.

I will use salas HV shunt supply for my tubes. There are people in this thread, that are having good results. Big respect to salas for all his simple yet very effetive shunt psu designs :up:
 
Delay is always the same as long as the operational conditions stays stable (t, Vs). HC157 should be ok for source select, it's 10ns delay is not trivial, even using 96khz sampling, when bit clock is 6.1mhz, so 160ns window. But I would still compensate it with some HC540 buffers, if it was up to me.
As always, reclocking after all this logic stuff could be implemented, and no more worries about any non matching delays.
I try to learn basic digital electronics stuff on the fly so more questions:
- You suggest this buffer to isolate the reclocking logic and AD converter from outside world and to compensate for possible I2S line losses?
- Isn't a non inverter HC541 the one that I should use?
- It can be used to buffer by simply connecting OE1 and OE2 to dgnd and the input/output pins?

Thanks.
 
Sampler,

I have used the Salas HV regulator for the I/V. Results are good in terms of noise, and I like the overall sound, but I did not compare with other regulators. Implementation is very easy and stable. I have a step by step manual for the Salas HV regulator if you need one.

D.
 
- You suggest this buffer to isolate the reclocking logic and AD converter from outside world and to compensate for possible I2S line losses?
- Isn't a non inverter HC541 the one that I should use?
- It can be used to buffer by simply connecting OE1 and OE2 to dgnd and the input/output pins?

Thanks.
- I suggest using it instead of HC02 nand’s, to add what ever delay is needed for compensating non shifted signals. 1 buffer – 5 to 15 ns, depending on logic type, manufacturer, Vs and t .
- Yes, 541 non inverting type, sorry.
- Yes, OE1 OE2 is inverted inputs enable so to gnd.

Second option is to stop using any compensation and reclock using MCK from your I2S source to put everything in perfect sync. Good example would be Eric Juaneda’s decoder.

You can get WM8804 from Farnell with price 3 EUR piece + delivery.

Wow :eek: something changed in that area. Mouser.com still list’s 157Eu price :D
For 3Eu, it’s really worth investigating.

Sampler,

I have used the Salas HV regulator for the I/V. Results are good in terms of noise, and I like the overall sound, but I did not compare with other regulators. Implementation is very easy and stable. I have a step by step manual for the Salas HV regulator if you need one.

D.


Thank you for sharing this, didn’t had time to read that whole thread yet. I have changed all my preamp regulators from simple technics virtual capacitor (like used by audiodesign for a lot of his projects including this one) to shunt type like Salas some time ago. In my subjective opinion this brought some audible differences. Less noise – more space for music :yes:
Would appreciate a link to this manual, thanks.
 
Sampler,

I have used the Salas HV regulator for the I/V. Results are good in terms of noise, and I like the overall sound, but I did not compare with other regulators. Implementation is very easy and stable. I have a step by step manual for the Salas HV regulator if you need one.

D.

D.
I would like to try the Salas HV Shunt ( I believe Quanghao is doing a board)
Can I also have access to the manuaL? I am currently working my way through the site sampler provided)
Thanks
Bob
 
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