Bob Cordell's Power amplifier book

Hi Doug,

I'm sorry I'm late to get onto this. It looks like you have already gotten some pretty good answers. The circuit in Randy Slone's book is where I first saw this problem circuit. Most of us like current mirror loads for a lot of good reasons you and I have explained. Many of us also believe strongly in a push-pull VAS. Many also like the symmetry of the double complementary input stage (it looks so nice and symmetrical when you draw it, at least). Put those ideas all together and you get this problem circuit.

The key to understanding the problem is that it is at minimum unwise to design a circuit that depends on the non-ideality of the devices. For this reason, we must be able to calculate the VAS standing current with infinite beta and no Early effect in the NPN and PNP VAS Darlinton pairs. We must also assume no Early effect in the other transistors as well. But now we must also factor in other real-world mismatches, like input transistor diff pair Vbe offset and differences in emitter degeneration resistor values due to tolerance. It is then easy to see that one can arrive at virtually any VAS standing current, given small mismatches and extremely high beta transistors.

I'm surprized that you were able to calculate a standing current value, and I'm gussing you had to make some assumptions about finite beta, etc.

I suspect a SPICE run will readily show the problem if you use high-beta transistors and make all of the degeneration resistors 470 ohms except one in my Figure 7.9. Take that one and vary it from 440 to 500 ohms, and you should see the VAS standing current go all over the place.

Note in Figure 7.10 I show how to greatly mitigate this problem in this circuit while still retaining most of the advantages of the current mirrors. I just add a helper transistor to the current mirror and add some "load" resistance.

Cheers,
Bob

Hi Bob :)

It's interesting you're touching on this circuit as the circuit crossed my thoughts when I was mulling over what traits I wanted my MF500 design to fulfill. The fun thing here is that this can also be described in the manner of "what wants to happen" in a circuit. The situation assumes a proper working GNFB:

An mirror loaded LTP output always wants to 'throw' its voltage to make sure the mirror balances out. In a symmetric LTP scenario, there are now two outputs that each try to settle their outputs so the result would be a zero output signal when there's no input signal.

That's where the fun starts. Assume both LTPs settle 'right' for a given VAS current to run. There are an infinite number of voltage points for both legs at which the output is effectively zero. The only difference? A wildly varying VAS quiesent current! So what happens? The circuit is highly eratic, neither LTP can't settle against anything and will most likely result in blown drivers the second power is applied. Current likes to find the lowest resistance path and WILL abuse the inability for the LTPs to define bias current.

That's why I designed my VAS in such way that I no longer need a symmetrical input stage; I can use a single-ended differential pair to drive my VAS with a current mirror loaded IPS. The VAS itself is a fully symmetric push-pull setup so I'm thinking I managed to combine the 'best' of different worlds :)
 
Thank you all for your input. I thought this subject would benefit from a bit of ventilation. I must admit to being intrigued by the very low THD produced by a circuit that in theory cannot work at all. I will try to find how it does with such a tiny standing current when I get some spare time. (hollow laughter)

Hello Douglas,

That you ended up with a 'working' prototype is a fluke. The reason why it can not work is because the input stage generates two control signals of which neither is referenced. The 'only' reference is the reference generated by the GNFB of the circuit, derieved from the input signal. You will have two control signals operating independantly trying to 'fight' for a proper output value. The more ideal and similar those control paths are, the more undefined the circuit becomes.

It's because of the actual differences between each control signal path's impedances, device parameters etc that causes one control signal path loop (in context to VAS current biassing) to be slower or faster than the other, making one of them dominant. Your circuit differences in the two paths force the VAS standing current to a nearly-off state, the few uA standing current. You're lucky; any transient in the circuit could nudge either loop into opening the flood gates... err VAS gates, or immediately start up in that state.

In process control terms, there is no absolute reference within and so it will chase its own tail.

You wondered about incresed instability at 20KHz + right? The nudging is getting strong enough right there to make the other control path dominant, ending up with two control paths fghting for domination over the same process output.
 
Hi MagiBox,
It's because of the actual differences between each control signal path's impedances, device parameters etc that causes one control signal path loop (in context to VAS current biassing) to be slower or faster than the other, making one of them dominant.
This is reflects my way of thinking about this topology since years.

That's why I designed my VAS in such way that I no longer need a symmetrical input stage; I can use a single-ended differential pair to drive my VAS with a current mirror loaded IPS. The VAS itself is a fully symmetric push-pull setup so I'm thinking I managed to combine the 'best' of different world.
Is there any link where the schematics of your VAS can be seen ?
 
There is, but it is an unfinished concept. I was busy prototyping the concept, but due to time and budget constraints I had to shelve the project :( It's the first thing to pick up again as soon as I get some time for it. You might want to search for the term "MF500" in this forum, it should show you the thread detailing the amp concept.
 
Hi Bob :)

It's interesting you're touching on this circuit as the circuit crossed my thoughts when I was mulling over what traits I wanted my MF500 design to fulfill. The fun thing here is that this can also be described in the manner of "what wants to happen" in a circuit. The situation assumes a proper working GNFB:

An mirror loaded LTP output always wants to 'throw' its voltage to make sure the mirror balances out. In a symmetric LTP scenario, there are now two outputs that each try to settle their outputs so the result would be a zero output signal when there's no input signal.

That's where the fun starts. Assume both LTPs settle 'right' for a given VAS current to run. There are an infinite number of voltage points for both legs at which the output is effectively zero. The only difference? A wildly varying VAS quiesent current! So what happens? The circuit is highly eratic, neither LTP can't settle against anything and will most likely result in blown drivers the second power is applied. Current likes to find the lowest resistance path and WILL abuse the inability for the LTPs to define bias current.

That's why I designed my VAS in such way that I no longer need a symmetrical input stage; I can use a single-ended differential pair to drive my VAS with a current mirror loaded IPS. The VAS itself is a fully symmetric push-pull setup so I'm thinking I managed to combine the 'best' of different worlds :)

Hi MagicBox,

You've provided a very good description of the problem with that circuit. Although the problem can be overcome, I also prefer to have a single unipolar input stage, made with good N-channel duals that are readily available from companies like Linear Systems.

Cheers,
Bob
 
Hi Bob,

Yeah basically you'd be turning one of the control signal paths into reference signal paths (just like a CCS output is for example). I've come across what seems to be very interesting types of mosfets. I'm considering to negotiate samples to see how these would do for inputstages and mirrors. They have a tight matching and can dissipate up to 500mW. With the number of transistors in a package, one package could house a cascoded input stage. I really wonder how they'll do. They have a very low input capacitance as well and near infinite DC gain.

Check them out :) They'll probably be expensive, but specs wise I think these could be used to build very linear stages when cascoded to honour their voltage/power limits. What would you think of these?

Cheers,
Magic
 
Hi Bob,

Yeah basically you'd be turning one of the control signal paths into reference signal paths (just like a CCS output is for example). I've come across what seems to be very interesting types of mosfets. I'm considering to negotiate samples to see how these would do for inputstages and mirrors. They have a tight matching and can dissipate up to 500mW. With the number of transistors in a package, one package could house a cascoded input stage. I really wonder how they'll do. They have a very low input capacitance as well and near infinite DC gain.

Check them out :) They'll probably be expensive, but specs wise I think these could be used to build very linear stages when cascoded to honour their voltage/power limits. What would you think of these?

Cheers,
Magic

Hi Magic,

Sounds like an interesting approach to check out. Thanks for the link. I'll check it out when I get back from RMAF. It has been a great show, with some very good-sounding rooms, and the usual cadre of rooms with good equipment that are playing poor material that makes their stuff sound bad. Lots of exhibitors and many, many rooms to see. Quite a bit of good tube equipment and Vinyl equipment on display.

Cheers,
Bob
 
Hi Magic,

Sounds like an interesting approach to check out. Thanks for the link. I'll check it out when I get back from RMAF. It has been a great show, with some very good-sounding rooms, and the usual cadre of rooms with good equipment that are playing poor material that makes their stuff sound bad. Lots of exhibitors and many, many rooms to see. Quite a bit of good tube equipment and Vinyl equipment on display.

Cheers,
Bob

What good material should they have used then?
 
Hello,
I was reading some replies ago about the ill defined vas current with the Slone circuit. Nothing new but but there is another way to avoid the fighting vas current. At least something that works since i built it and could see for myself.

however i didnt progress since one year, so this one is just to post for those interested. Design based on information from E Stuart.

Cheers

http://www.diyaudio.com/forums/soli...ogy-construction-troubles-38.html#post2788413
 
Hi Guys

Having only skimmed through Slone's high-power audio amp book, the chapter of interest there is actually a verbatim copy of a Motorola app note (AN1308), showing how to use the 3281/1302 BJT pairs to build a 100W and 200W amp. I have a copy of the app note, written by Andrew Hefley, an audio consultant, and in these designs complimentary diff-amps are used but they are resistively loaded.

I assume the problematic circuit is from Randy's project book?

One detail that I find to be completely over-blown and dripping with historic lethargy is the predictability of VAS current. From their ealiest writings in Wireless World, Self, Linsley-Hood, Baxandall and others have parroted the idea that the VAS current should be essentially solid and unchanging, hence the evolution from a fixed R, to a bootstrapped R, to an active current source load for the VAS. Push-pull VASs are denounced for not having a steady idle current, which is nonsense in a properly designed circuit.

My impression of why the predictable steady current is desired is the coincident desire to cling to a single-BJT bias regulator. It has been demonstrated in more than one place by more than one designer that slightly more complex bias spreaders exhibit the flat voltage control versus current that one needs particularly with a push-pull VAS. Most bias circuits in modern amps are slightly more complex anyway, with additional tempco constants built in, many making use of a second BJT. If these complexities are allowed, why is a "better" bias regulator not okay?

Some of the solutions found in the other threads linked above, provide elegant methods to produce predictable VAS currents when using current mirrors in comp-diff amps. There is a basic compromise that is hardly mentioned or glossed over inasmuch as emitter degeneration must be used if device matching is not to remain critical. The added Rs contribute noise, as do the mirrors themselves, so going fully complimentary with mirrors and current sources and anything else that can be duplicated seems like _a_ solution, but so is retaining the simpler circuit and matching the BJTs. Either way, slew rate is far higher than required for audio, so not much is lost except excess.

Have fun
Kevin O'Connor
 
..........................My impression of why the predictable steady current is desired is the coincident desire to cling to a single-BJT bias regulator. It has been demonstrated in more than one place by more than one designer that slightly more complex bias spreaders exhibit the flat voltage control versus current that one needs particularly with a push-pull VAS. Most bias circuits in modern amps are slightly more complex anyway, with additional tempco constants built in, many making use of a second BJT. If these complexities are allowed, why is a "better" bias regulator not okay?........................
I think you are chasing the wrong horse.
The Vbe multiplier is basically a constant DC voltage source combined with a near zero AC impedance.
 
Hi Kevin,

Are you suggesting that the troubles with Randy's amp can be solved by using a more stable OPS bias generator, i.e. one that is insensitive to a variable VAS current?
If so, then I disagree. The trouble with Randy's VAS is that it is not just a bit variable, rather it's undefined, totally. It can range from zero to a destructive high current. A better bias generator will not solve these issues.

Cheers,
E.
 
A Vbe multiplier impedance follows the diodic impedance rule. At 10mA it's about 3.3R, at 1mA it's about 33R. Or 27R or thereabouts. This is multiplied by the factor of the multiplier. A 2.4V multiplier for instance will have an impedance of 13.2R. If the transistor has an Hfe of 100 and a 470R BE resistor is used, Ib adds about another 3.5R to this.

If we consider a 10% drift in bias significant, then we know it takes about 4.4mV to cause a 10% shift for a single diode. 8.8mV for a complementary EF output stage not counting emitter resistors. Say .22R degeneration at 120mA bias (.26mV). This means the output stage needs an extra 2.6mV for a 10% bias drift.

For a Vbe multiplier biased at 10mA, 2.4V with an Hfe of 100 and a BE resistor of 470R, with a complimentary EF output stage biased at 120mA with .22R degen, It would take only an excess 680uA through the VAS to raise output stage bias by 10%. With a bog standard 2Q CCS, a 10% reduction would be achieved if the current sensing transistor was heated 22C above normal, which would be somewhat extraordinary. In a 56V dual rail bootstrapped VAS however, a 3.7V rail drift would be enough.

I think this helps in getting some perspective on the issue.

If this isn't good enough, consider a CFP Vbe multiplier.

In amps where the VAS current source is not very good, which includes most bootstrap amps, the variation through the Vbe multiplier can be much more than 680uA at loud passages. This can affect crossover behavior.

In complimentary VAS amps with a double EF output stage, the driver Ib will go much more than 680uA and if you think about it this current is necessarily subtracted from the Vbe multiplier bias current. This effect can artificially lower the "oliver null point" because the multiplier's bias current peaks sharply during crossover.

So it can be important to have an effective lytic bypass across the Vbe multiplier if you want to have the expected crossover behavior.
 
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Hi Guys

Check the corral. Self showed quite clearly in figs. 7-19 and.15-34 (of his power amp design book, 2009) how adding one R to the simple BJT bias reg improves its output voltage stability, and how a CFP bias reg performs far better than the singleton, respectively. I showed this in TUT2 (1997) in fig.4-37. It is plain to see that a not much more complex bias regulator provides superior performance to the single BJT everyone clings to. Keantoken's description also shows how a single BJT just does not have the power to behave like a voltage source - at least not a good enough voltage source to be used as a proper bias regulator.

My post had nothing to do with whether such a bis reg could "save" the current-mirror loaded comp-diff front end - it can't. But... a proper bias reg that actually acts like a voltage source allows the use of push-pull VAS with its varying current output and all of both their other benefits.

Self and Cordell both spent much time trying to stabilise Vq, and Self made a pretty convincing demonstration of the importance of this design facet as a means to minimise overall distortion.

As I said, the goal to have a simplistic bias reg has often been a part of thrifty UK design, and this ripples into the rest of the design decisions, justifying them and resulting in an overall economical design with reasonable performance. Performance can always be improved no matter what strides we make, and it seems that "reasonable" is a moving target. My assertion is just that the economy that drove the initial decisions back in the 1960s have resulted in a dogma that is quite ripe now four decades later.

Have fun
Kevin O'Connor
 
Yes, that collector resistor needs to be equal to the impedance of the bias generator. I have not actually seen anyone calculate the impedance of the bias generator, they just use the value Self used. I've been told that it's for temperature compensation. If the value of this resistor is chosen right, both an increase and decrease in bias generator Iq will result in a falling bias.

The resistor can be calculated from:

Rc=(.026*(Rcb/Rbe+1))/Ic+(Rb/Hfe)

Where Rb is the resistance seen by the transistor's base, IE Rcb and Rbe in parallel. Rbb should be added to this if you know it. Rbb can be obtained from Cordell's SPICE models for many transistors.

This will not apply to strange bias generators such as CFPs or that have an extra diode in the divider or at the emitter.
 
Randy Slone's amp

Hi Guys
....
My post had nothing to do with whether such a bis reg could "save" the current-mirror loaded comp-diff front end - it can't. But... a proper bias reg that actually acts like a voltage source allows the use of push-pull VAS with its varying current output and all of both their other benefits.
...
Have fun
Kevin O'Connor

Okay, agreed. But aren't we drifting away from the original subject, raised by Olivier? That subject has nothing to do with bias generators.
 
Hi Guys

It seems to me that one of the other threads linked a few posts back has the fix for the VAS idle current issue for CM-loaded comp-diffs. There are probably other solutions but even you thought the idea was elegant.

My suggestion for a long overdue review of the notion that a constant or near-constant VAS idle current is "preferred" does seem related to the present discussion. A lot of respected designers parroted that same old line, casting a pall over push-pull VASs of all kinds for truly no good reason. I think if one dispenses with the VAS constant current dogma, one is freed to use push-pull VAS, push-pull diffs, better bias regulators, and all kinds of circuit variations that hold benefits as yet not fully explored.

The predictability of VAS idle current when CM-loaded comp-diffs are used seems mostly accepted. The various means suggested to fix the problem each have their pros and cons, as compromise of some sort is inherent in all design. So, you make a choice between balancing diff currents using matched devices or with CM loads. You choose between resistor noise or BJT noise. You might look at a common-mode current source load option at the expense of a few more parts. You choose between absolutely predictable VAS current or letting it land where it may. The list goes on.

I think one of the simplest solutions is to use the Wilson CM with fourth BJT added, as this sets both diff collectors at the same potential - or at least the collector in question has a set voltage. A VAS with emitter resistor then has a set base voltage to work against, with R being adjusted for the desired current. So, another compromise, doubling the BJT count for the mirrors...

Speaking of getting away from the original topic, shouldn't we be talking about how great Bob's book is? It has a few holes and some repetition but otherwise is very fine!
 
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Hi Guys
...
I think one of the simplest solutions is to use the Wilson CM with fourth BJT added, as this sets both diff collectors at the same potential - or at least the collector in question has a set voltage. A VAS with emitter resistor then has a set base voltage to work against, with R being adjusted for the desired current. So, another compromise, doubling the BJT count for the mirrors...
...

Hi Kevin,

This 'simplest solution' considerably reduces the VAS gain. Is that what you want?

Cheers,
E.
 
Hi Guys

Edmond, you certainly know that there are a multitude of ways to increase VAS gain. Is your query meant to be rhetorical?

It just seemed to me that the problem in defining the VAS current with the CM in place for comp diff inputs depended too much on exact Vbe levels in the operating circuit, and therefore some means of providing a less device-dependent output voltage was needed. The four-device Wilson CM does that, as far as I see, as would simply adding a diode to the two-device CM.

Poor VAS current definition is abated when the approximately 2Vbe of the mirror is weighed against a single Vbe for the VAS input, with the difference taken up by an emitter resistor. If you wanted to push the circuit back towards criticality, it is obvious that a Darlington VAS with 2Vbe input matches the 2Vbe CM output. But the devices all carry different currents at different temperatures, so their exact junction voltages will not be defined and you are back to the original problem.

You may have a subconscious agenda to keep the voltage loss in this circuit section as low as possible in order to maximise utility of the supply rails and thus attain maximum power? Most designers have that in mind even when it is not at the front of their mind. Personally I don't worry about it as low-loss output stages are easy to devise, and it is not always necessary to have maximum VAS gain to achieve very low distortion - it may be if this is the only stage you expect to get gain from.

I also don't worry about supply utility in that way as I don't run my amps to the point of clipping or anywhere near it. Most music signals live way below the full output of most amps, unless the amp is only capable of a watt or two.

Have fun
Kevin O'Connor
 
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