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Old 3rd August 2004, 01:04 PM   #71
mashaffer is offline mashaffer  United States
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Join Date: Jun 2004
Location: Indiana

That is an interesting design. It is much more complex than what I was looking at but then again this project has gotton more complex each day. I wonder how it would do without the GNF or if it could even be implemented without GNF. It seems that your current sources are dependent on feedback from the output.

The idea of using parallel plastic devices is appealing since it would keep the device current in the range of more constant hfe. I have, however, found that the MJ21196 has a nice flat hfe curve clear up to 3A so I might be able to do well with a single one of those for the output device. I could either use one of those or even a garden variety 2N3055 for the current source.

How would you plan to implement the voltage source at the emitter of Q1? What is the purpose of separating Q1 from its emitter resister through this voltage source? Is this to allow more input voltage swing? Oh wait a minute. You are using DC feedback to the emitter of Q1. So V3 must be to compensate for the DC voltage on the feedback path. Am I close?

I take it that in the actual circuit the bias voltage source would be replaced with some sort of resistive network to bias Q1 yes?

I am trying to understand the reason for the complex current sources that you are using. I admit that I am not familiar with the feedback current source or why one would use it. Can you explain further? If I am following this correctly the output current source is controlled by D4 in conjunction with R4 and R5 to set current. What is the purpose of the bootstrap? Does this configuration act more like a push-pull design than a CCS load? If so that would certainly contribute to lower 2nd harmonic I suppose.

I would expect this type of design to have relatively high 3rd harmonic (compared to the second). To what do you attribute the low 3rd harmonic content?

Thankyou for your patience. As should be obvious I am a greenhorn when it comes to amplifier design but I am anxious to learn.
The only reason I drive the 91 Colony Park is that I can't afford a 65. Me old school? Couldn't be.
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Old 3rd August 2004, 02:14 PM   #72
jcx is offline jcx  United States
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Join Date: Feb 2003
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quickly (i'm late, i'm late...)

V3 is just a test V for open loop gain, just a short in a real circuit

V1 has 1.7 V DC offset to bias amp properly - another quick Spice shortcut, yes just use a R divider from pwr supply to Q1_b to set DC, cap couple input signal

in output stage current source circuit Q4 is "error amp" and it's Vbe is the ref that regulates the current in sense resistors R8,9 by controlling Q5 - very common bipolar current source, just in an unusual place, usually Q4 emitter and sense R are at negative rail and regulated output current is taken from Q5 collector, R4,5 supply bias current to Q4, C3 bootstraps the voltage at R4,5 junction to follow the output V, keeping the voltage across R5 constant (and therefore the current through R5 is constant)

while some of the techniques could be used in without global feedback the low harmonic distortion relies on high loop gain reducing the current swing in Q1 to very low levels so that it's exponential Vbe/Ic curve's influence on distortion is reduced - second harmonic from the input Q roughly reduced by the loop gain, input stage 3rd harmonic drops ~ as the square of the loop gain

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