That would be around 500 MHz and I have absolutely no way of testing that. Anyway, the single wire with HBR for signal ground locally has eliminated the problem. Just a few minutes ago, I test connected the power amplifier after making changes that took a long time. That also appears to be free of problems seen earlier.
I did run across the problem of the scope ground being connected to the signal generator ground via the house wiring. The scope ground was clipped to the negative lead of the voltmeter which I had moved to the output rail to check bias voltage. 38 rail volts across the 1/4 watt 4.7 Ω HBR (307 watts !!!) No smoke left in that resistor.
Glad it's all working!
Getting a good ground for a scope, especially at anything above a few MHz, is a real pain. One trick I like to use, barring a 'real' differential probe, is to use a dual trace scope with two probes where you invert one probe and view the sum of the two probes. That way you can probe your choice of ground and signal, and as long as you adjust the gains of the two channels equally, you get sorta decent common mode rejection.
It's a lot easier to do this on an older Tek analog scope, but it's possible to do it on a new Rigol, just much more annoying. I can't figure out how to display only the summed (math) trace on the Rigol, so it annoys me more, but I bet there's a way to do it more easily.
The other great advantage is that your scope can be grounded independently of everything else, without chance of shorting anything to earth ground. You can probe away and look at relative voltages very easily, something you probably want more than just voltage re. ground.
Have some fun and calculate the worst case error when subtracting one channel's output from another's. Here are a few cases to consider:
- Both inputs solidly connected to GND. Input delta-V equals zero.
- Both inputs solidly connected to Scope Calibrator output (1 kHz square wave). Input delta-V equals zero.
- Both inputs solidly connected to +5V. Input delta-V equals zero.
- One input connected to +5V. Other input connected to sinewave generator whose offset=0 and amplitude = ±0.1 volts peak. Input delta-V equals 4.9 to 5.1V
- One input connected to +5V. Other input connected to sinewave generator whose offset=+5V and amplitude = ±0.1 volts peak. Input delta-V equals -0.1 to +0.1V
- Breadboard a D-flipflop logic IC such as 74HC74, connected as a divide-by-two. Apply a 20 kHz clock. One scope input connected to Q, other input connected to Qbar. Input delta-V is a square wave from -VCC to +VCC.
Using a scope, the right way is far more better.
Some don't have "Channel A - Channel B", because they have "add A B" and "channel invert".
http://www.cordellaudio.com/book/Book2_TOC.pdf
Double Cross Output Stage. I can't find any info. What is that ?
Double Cross Output Stage. I can't find any info. What is that ?
My numbers add up just fine.
I intentionally (as clearly drawn/shown in the simplified diagram) omitted the parallel signal ground return path through the opposing channel "hum-blocking" resistor simply to convey in a first order analysis the wrongheadedness of separating the so-called "dirty" speaker ground return from the "clean" signal ground with said resistor and so as to not confuse/compound the issue further with:
1) The additional problem of inter-channel cross-talk degradation incurred by the faulty wiring scheme when the parallel return path is taken into account.
2) The additional potential problem of mains earth ground loops entirely dependent on however the signal grounds may or may not be terminated to "earth" in both the source chassis and and amplifier chassis.
I see nothing here to argue about, unless someone insists on being deliberately obtuse.
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Dear Bob, im simulating an amplifier with a single differential pair at the input plus a tail current source and current mirror in the collectors, im using the darlington arrangement for the VAS, and the compensation capacitor is 68pF, my diff amp tail current is 2mA. According to my calculations that should give me a slew rate of 2mA/68pF = 29 V/usec. However in my simulation I inject a pulse wave and im measuring around 15 V/usec, which is around half of my calculation. What am I doing wrong? Should the SR calculation use the complete tail current or only half? because if I use half the tail current I get 1mA/68pF = 14 V/usec.
Thanks!
Thanks!
Hi Bob and other forum members,
I also have a IPS related question.
If there is a current source supplying 1mA to the differential pair and a current mirror providing the load for the differential pair. If the voltage at the input increases. The current at the input of the current mirror will be also increase to let's say 0.6mA it then makes sense that the output of the current mirror will be 1mA less 0.6mA = 0.4mA or will it?
This is my question and where I am confused. If the current mirror, mirrors the current at its input then wouldn't it's output would be 0.6mA as well. But there is only 1mA available.
Hmmm. If someone could possibly explain this to me. I would be very grateful.
I also have a IPS related question.
If there is a current source supplying 1mA to the differential pair and a current mirror providing the load for the differential pair. If the voltage at the input increases. The current at the input of the current mirror will be also increase to let's say 0.6mA it then makes sense that the output of the current mirror will be 1mA less 0.6mA = 0.4mA or will it?
This is my question and where I am confused. If the current mirror, mirrors the current at its input then wouldn't it's output would be 0.6mA as well. But there is only 1mA available.
Hmmm. If someone could possibly explain this to me. I would be very grateful.
The extra current is coming from the next stage. That's how the next stage is driven.
Jan
@jan.diddon
How can this be. The current in an LTP is provided by the LTP current source and can only branch. The current mirror and next stage are loads on the collectors of the differential transistors. There may be a small contribution from the next stage collector base junction capacitance. But it is very small and only under dynamic conditions. There may be a small contribution from leakage currents as well. Some of the LTP current is lost to the input bias currents. This amount is unavailable to the differential transistor collectors.
How can this be. The current in an LTP is provided by the LTP current source and can only branch. The current mirror and next stage are loads on the collectors of the differential transistors. There may be a small contribution from the next stage collector base junction capacitance. But it is very small and only under dynamic conditions. There may be a small contribution from leakage currents as well. Some of the LTP current is lost to the input bias currents. This amount is unavailable to the differential transistor collectors.
At the slew rate limit that current is not small, it takes all the IPS current. Most standard designs of amp slew-limit when the compensation capacitor current reaches the maximum from the IPS.
1mA into 100pF is 10V/µs at the output.