OTL tube folded cascode headphone amplifier idea

[Filip4]

Hi all,
I have some spare 6n6p at home, so I decided to build something with them. I started with simulation and I thought, why not try folded cascode. So this is only idea because folded cascode with tube has to much gain. When you set up circuit properly, it has very low THD but it is suitable maybe for RIAA.

I used some feedback and adjust voltage and resistors to get it working for headphones.

Any ideas or advice are welcome. Maybe this not suitable at all for headphones. But simulations cost nothing .

Schematic:


THD:


AC:


Open loop gain:



If anyone wants, there is ltspice file.
View attachment hybrid folded cascode.asc

 

[alexberg]

Q1 and Q2 input impedance(s) are 9 Ohms @ 3 mA. There is no point in employing CCS.

 

[PRR]

....simulations cost nothing ....

And lie a lot.

The Q2 Q4 node will NOT be 49.569656V in real life. Far more likely to jam-up at 124V or near zero.

Try making a 10% or 5% change of Mu of _one_ triode. This is well within normal tolerance (unlike the exact matching intrinsic to simulation). Q2Q4 node will go way off.

 

[Rick PA Stadel]

.. and simulations do cost/consume your time and intellectual energy.

I was wondering about the compound CCS Plate loads, too. How about swapping at least one of 'em for a CCS for the Source follower load at the output - would improve linearity.

Then, maybe bypass R/R and tap off it with 110K, would keep the same gain. That would greatly improve the V/2 (6dB!) PSRR. A somewhat larger capacitor value could even hold off the rail-to-rail thumps that cold-tube power-ups will likely otherwise produce.

Might even be worth a zener sub-supply for the output stage, maybe 12 or 18V or so -- just to be a little nicer to the phones.

Neat idea .. and simulations ARE still fun.

-R

 

[Rick PA Stadel]

Sorry, I meant to say 'bypass R4/R6'. Too late now to edit ..

-R

 

[Mark Tillotson]

And lie a lot.

The Q2 Q4 node will NOT be 49.569656V in real life. Far more likely to jam-up at 124V or near zero.

Try making a 10% or 5% change of Mu of _one_ triode. This is well within normal tolerance (unlike the exact matching intrinsic to simulation). Q2Q4 node will go way off.

Indeed, or put another way there is no DC feedback path to set the quiescent point. The final MOSFET should be DC coupled to the current mirror output. Perhaps just move R4 to be in parallel with C3?