Hi,
Most probably the same can be done for Driverack PA2 as they are schematically similar.
So what you would need:
- Driverack 260 (if you don’t have it still)
PA audio processor 2 in 6 out 260 digital audio processor 3 in 6 out professional advanced crossover effect processor|Stage Audio| - AliExpress ($227)
(a Chinese Driverack 260 clone, schematically equal)
- Optical/Coax receiver board, in my case it’s DIR9001 based
DIR9001 module Fiber coaxial Coaxial Receiver SPDIF to I2S output 24bit 96khz Dedicated for DAC|Replacement Parts & Accessories| - AliExpress ($13)
- Sample rate converter (SRC) board, in may case it’s SRC4192 based
I2S frequency up 192K/24BIT board, SRC4192 frequency up board, DAC upgrade board|Connectors| - AliExpress ($22)
- wires, soldering iron, etc.
- some mechanical work for placing the boards above inside the 260
The boards can be successfully placed into the empty space between the main 260 board and the power switch/sockets (inside the 260). You would just have to drill holes for coax and spdif connectors in the rear panel. Optionally you may want to add a switch to choose digital or analog source.
The main idea is redirecting (new) digital source from the native ADC (AK5385B or AK5392)
to SRC. So you need to cut ADC output (pin 15) from the DSP processor and connect input digital data to DSP processor from SRC. SRC is required to resample/synchronize coax/spdif data for purely synchronous (internally clocked) DSP.
SRC must be configured for passive output (it must be synchronized by the native DSP clock finally). The used SRC board is configured for active output by default, so you need reconnect pin 26 (MODE0 of SRC4192) from 0 to 1, to make the output passive.
Wiring:
The native ADC – to SRC:
- p13 (ADC’s LRCLK) to SRC’s LRCLK output (passive mode)
- p14 (ADC’s BCLK) to SRC’s BCLK output (passive mode)
- DSP’s SDATA (that was initially connected to ADC’s p15/SDATA) to SRC’s SDATA output (passive mode)
SRC (passive input) to Digital receiver (active output):
- SDATA to SDATA
- LRCLK to LRCLK
- BCLK to BCLK
(Master clock of SRC should not be connected anywhere. It should be pure passive to passive conversion)
Other details on the request, welcome
Thank you,
Serge
Most probably the same can be done for Driverack PA2 as they are schematically similar.
So what you would need:
- Driverack 260 (if you don’t have it still)
PA audio processor 2 in 6 out 260 digital audio processor 3 in 6 out professional advanced crossover effect processor|Stage Audio| - AliExpress ($227)
(a Chinese Driverack 260 clone, schematically equal)
- Optical/Coax receiver board, in my case it’s DIR9001 based
DIR9001 module Fiber coaxial Coaxial Receiver SPDIF to I2S output 24bit 96khz Dedicated for DAC|Replacement Parts & Accessories| - AliExpress ($13)
- Sample rate converter (SRC) board, in may case it’s SRC4192 based
I2S frequency up 192K/24BIT board, SRC4192 frequency up board, DAC upgrade board|Connectors| - AliExpress ($22)
- wires, soldering iron, etc.
- some mechanical work for placing the boards above inside the 260
The boards can be successfully placed into the empty space between the main 260 board and the power switch/sockets (inside the 260). You would just have to drill holes for coax and spdif connectors in the rear panel. Optionally you may want to add a switch to choose digital or analog source.
The main idea is redirecting (new) digital source from the native ADC (AK5385B or AK5392)
to SRC. So you need to cut ADC output (pin 15) from the DSP processor and connect input digital data to DSP processor from SRC. SRC is required to resample/synchronize coax/spdif data for purely synchronous (internally clocked) DSP.
SRC must be configured for passive output (it must be synchronized by the native DSP clock finally). The used SRC board is configured for active output by default, so you need reconnect pin 26 (MODE0 of SRC4192) from 0 to 1, to make the output passive.
Wiring:
The native ADC – to SRC:
- p13 (ADC’s LRCLK) to SRC’s LRCLK output (passive mode)
- p14 (ADC’s BCLK) to SRC’s BCLK output (passive mode)
- DSP’s SDATA (that was initially connected to ADC’s p15/SDATA) to SRC’s SDATA output (passive mode)
SRC (passive input) to Digital receiver (active output):
- SDATA to SDATA
- LRCLK to LRCLK
- BCLK to BCLK
(Master clock of SRC should not be connected anywhere. It should be pure passive to passive conversion)
Other details on the request, welcome
Thank you,
Serge