TDA1545 Reclocking Problem

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Hi

I recently built a zero sampling DAC using the CS8412 and TDA1545a combination. CS8412 is giving output in mode 5.
I also built a Async Reclocking based on DDDAC's design, an XO at 11.2896MHz and divided by a binary divisor to give the correct Fs.

I wanted to put it into the DAC but couldn't find the " in" mode for Mode 5 LSBJ format on the datasheet. The DDDAC uses I2S format, so there is both "in" and "out" mode available.

Any advice would much appreciated.

thank you.
 
Hi all,

Maybe allow me to rephrase my question:
Is it possible to configure the CS8412 in mode 5 -16bit LSBJ to accept SCK and FS as an input signal.

For the I2S format, the choice is between mode 2 and mode 3.

Any advice on an alternative approach to reclock these signals is much appreciated.

thanks in advance for your assistance.
 
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This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.