Sigma Delta Bandwidth

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Hey all.
I'm designing myself a (hopefully) higher order sigma delta modulator using op amps.
As of right now I have a working computer model of a 1st order system, but it doesn't seem to want to work properly past 10kHz.
I'm thinking it's the integrator, and I've tried to set the 0dB point all the way up to like 50kHz, and still it doesn't look quite right.
Here's the set up:
Input to summing amp (+), integrator, comparator (+ rail, 0), d-flip flop, comparator (+/- rail), to input summing amp(-).
I've looked at all the waveforms, and I don't think it's the clock speed.
Any hints/tips/ideas?
I'm using general purpose opamps and comparator opamps so that I can make use of a 2V input from a CD player or other input device.
If it'd help, I can include a schematic and some waveforms, or if it'd help I can include the OrCAD files.
Thanks all!
(I'm pretty new to this design stuff, so take it easy! haha)
-Dave
 
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