Hello!
I am building a closed loop digital class D audio amplifier system using FPGA and TAS5103 H-bridge IC and a few other discrete ICs. I have the following doubts:
1) This amplifier is for an 8 ohm speaker load. Does this mean, i have to physically place a resistor of 8 ohm for characterizing the system? (I am planning to use an XLR connector to connect to the audio analyzer. )
2) The closed loop system needs an input at 768kHz. This means that the filter on FPGA requires input to come at a rate of 768kHz. Could anyone suggest, how i could provide an audio input to test the performance?
I am building a closed loop digital class D audio amplifier system using FPGA and TAS5103 H-bridge IC and a few other discrete ICs. I have the following doubts:
1) This amplifier is for an 8 ohm speaker load. Does this mean, i have to physically place a resistor of 8 ohm for characterizing the system? (I am planning to use an XLR connector to connect to the audio analyzer. )
2) The closed loop system needs an input at 768kHz. This means that the filter on FPGA requires input to come at a rate of 768kHz. Could anyone suggest, how i could provide an audio input to test the performance?
1/ I would add a load for testing, then you can test output filter properly.
2/ You need a voltage controlled oscillator to create audio modulated 768KHz.
Or just to test apply a square wave from a sig gen and move the frequency up and down to test it.
2/ You need a voltage controlled oscillator to create audio modulated 768KHz.
Or just to test apply a square wave from a sig gen and move the frequency up and down to test it.
The closed loop system needs an input at 768kHz
Why? Isn't it an audio amplifier?
Do you mean feedback?
Feedback ADC have 2 important requirements: 1 should transfer audio signal perfectly, and 2: switching freq components should not disturb audio band. You can test these two independently with normal equipment.
Class D uses a carrier frequency and 700kHZ is typical. Most commercial amplifiers using the IRS2092 chip run at between 400 and 500kHZ.Why? Isn't it an audio amplifier?
Do you mean feedback?
Feedback ADC have 2 important requirements: 1 should transfer audio signal perfectly, and 2: switching freq components should not disturb audio band. You can test these two independently with normal equipment.
Theoretically, the higher the frequency the less induction is required in the output filter, so less ferrite and copper. So cheaper to manufacture.
Class D uses a carrier frequency and 700kHZ is typical. Most commercial amplifiers using the IRS2092 chip run at between 400 and 500kHZ.
Theoretically, the higher the frequency the less induction is required in the output filter, so less ferrite and copper. So cheaper to manufacture.
I wouldn't say 700 kHz typical, it's almost 2 times more than the recommended maximum of the TAS5103 intended to used here. You actually missed what is the discussion about. Not switching freq, but sampling freq (of ADC). So your comment is massively offtopic.
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