Oh, oh, here we go again - just let's not get into this argument about SPDIF transformers, etc. - you've stated what your preferences are.
I'm not aware of getting into a particular argument about SPDIF transformers and such. We're both interested in the same thing - getting good pulse fidelity and low interference with SPDIF.
Even if John's not interested, here are some suggestions for people who would like to attempt gilding the lily with SPDIF. I've gleaned many of these ideas from another place, so no claims to originality
Firstly using the DIT4192 to drive a cable isn't going to give ultimate performance in my estimation. That's because in the datasheet TI doesn't mention things that matter in RF line drivers like output impedance and rise times. So chances are, they've not thought about them. Secondly since the output drivers and logic share a common supply within the chip there's going to be noise on the supply which also means some jitter is inevitable.
The first step then is to reclock the DIT4192's output with a pico flip-flop powered from its own clean supply. I suggest looking at TI's 74AUC1G80 for this function. I've not looked closely at the DIT4192's datasheet to see which polarity of the master clock its output changes on, so this might need to be done by inspection - we don't want metastability problems in the flip-flop. Level shifters will also be needed (suitably chosen resistive dividers will suffice) between the clock and data signals and the flip-flop's inputs. The flip-flop's power supply voltage needs to be from 1-2.5V.
The end of the transmit chain is preferably a video opamp as this will have a well defined output impedance at all times, including the switching transitions. Between the flip-flop's output and the opamp sits a passive RC filter with a -3dB point somewhere between 50 - 100MHz which hopefully limits the rise time to 3-7nS or thereabouts. If you're going to run at 192kHz the 100MHz figure might be too low though. I'd go for 50MHz for up to 44k1 and 100MHz for 44k1 up to 96k.The video opamp needs to be unity gain stable, at least 100MHz UGBW and have a slew rate comfortably in excess of 330V/uS so I suggest looking at OPA890 and LM6171. The opamp's input filter is arranged to create a nice bandlimited pulse waveform of 1V peak which the opamp then sends via a series 75R termination into the cable. With a 75R termination there'll be a 500mV signal at the receiver.
That to me seems to be the best way to get the lowest possible jitter and noise on an SPDIF output. Anyone here see ways to improve on it? Note that there's no isolation transformer - isolation to be done at the input if required.