Hi All,
Hoping for some advice with my current build. I am intending to implement a source follower buffer/bootstrap CCS for the input and driver stage, a bit like the below image.
Due to the heatsink configuration, I am limited to a about 2W dissipation in the FET, which means I can run it at 10mA or so.
I was hoping to run the 6SN7 at 10mA also (200V at 10mA looks like a real nice operating point under constant current conditions).
It occurs to me that perhaps the bootstrap won't work well supplying 10mA with only a 10mA sink capablity in the follower, i.e. the follower should possibly be run at significantly more current than the 6SN7. Is this a valid assumption? Not sure I completely understand all the factors at play.
I am pretty much locked in to 10mA in the follower, so the alternative is to run the 6SN7 at 5mA or so (with 20k load resistors).
Appreciate any thougthts you might have!
Greg
Hoping for some advice with my current build. I am intending to implement a source follower buffer/bootstrap CCS for the input and driver stage, a bit like the below image.
Due to the heatsink configuration, I am limited to a about 2W dissipation in the FET, which means I can run it at 10mA or so.
I was hoping to run the 6SN7 at 10mA also (200V at 10mA looks like a real nice operating point under constant current conditions).
It occurs to me that perhaps the bootstrap won't work well supplying 10mA with only a 10mA sink capablity in the follower, i.e. the follower should possibly be run at significantly more current than the 6SN7. Is this a valid assumption? Not sure I completely understand all the factors at play.
I am pretty much locked in to 10mA in the follower, so the alternative is to run the 6SN7 at 5mA or so (with 20k load resistors).
Appreciate any thougthts you might have!
Greg
Your FET has no protection on the gate, so I'd fix that first.
The issue is whether the FET can ever get starved of current due to the loads on it, for then the feedback loop breaks down. For that you need to know the load impedance this circuit is driving, which will be in parallel with R1 through C5.
The issue is whether the FET can ever get starved of current due to the loads on it, for then the feedback loop breaks down. For that you need to know the load impedance this circuit is driving, which will be in parallel with R1 through C5.
Thanks Mark, the fet has inbuilt zeners on the gate, but I was planning on adding external ones anyway.
The fet and 6SN7 share a 2.5k and 100uF RC filter on the B+ rail.
The circuit is driving an EL34, possibly a KT88. Let me go do some calcs...
The fet and 6SN7 share a 2.5k and 100uF RC filter on the B+ rail.
The circuit is driving an EL34, possibly a KT88. Let me go do some calcs...
