One way to measure the phase noise is to look at the noise skirts in FFT spectrum as JosephK did here: https://www.diyaudio.com/community/...jitter-crystal-oscillator.261651/post-6710439. This requires a very small bin size. I decided to make similar measurements with REW albeit the FFT size in REW is limited to 4M. But anybody with REW, DAC and ADC can repeat these measurements.

I used my own boards for the measurement:

- AK4490 DAC
- ES9822PRO ADC
- USBI2S bridge

First 11.025k sine of -1.5dBFS at 44k1. This uses 22.5792MHz ECS-2520MVLC clock having phase noise in datasheet as -89dBc/Hz @10hz (https://www.mouser.fi/datasheet/2/122/ECS_2520MVLC-1903379.pdf).

Note the horizontal scale (+/-10Hz). Not bad for a $1 clock.

Next up 12k sine of -1.5dBFS @48k. This uses a 24.576MHz NZ2520SDA clock with presumably lower close-in phase noise.

Clearly better but whether or not audibly better is another story.

Besides clock there are other factors that affect phase noise. One is Vref. In my AK4490 DAC Vref is fed by LT3042 regulator (separate L/R).

Here is the same measurement as above but with slightly altered Vref implementation.

Clearly much worse and a much bigger impact than clocks.

The only difference between graphs 2 and 3 was that Cset capacitor of LT3042 was changed from 22uF/15V tantalum polymer to 22uF/25V X5R. The result is understandable as Cset affects the 1/f noise of LT3042. Input and output capacitors of LT3042 are not critical for Vref phase noise.