In AN159 Crystal describe the optimum values for the PLL circuit of CS8420:
http://www.eetasia.com/ARTICLES/2001APR/2001APR16_MSD_AN4.PDF
However in this document:
http://www.cirrus.com/en/pubs/errata/ER245D1.pdf
Crystal say that the new devices need other values for the PLL circuit. There is however no application note for the new device.
The values mentioned in the datasheet are very likely NOT the real optimum values, as the values calculated with the application note are different from those in the datasheet.
So, what are the real optimum values for Rfilt, Cfilt and Crip?
For the old devices the values should as follows, assuming you want 44.1 kHz operation:
Rfilt = 7k5
Cfilt = 39 nF, X7R smd
Crip = 1000 pF, C0G smd
Is there anybody on this forum who knows how to calculate the values for the new devices?
thanks,
ABo
http://www.eetasia.com/ARTICLES/2001APR/2001APR16_MSD_AN4.PDF
However in this document:
http://www.cirrus.com/en/pubs/errata/ER245D1.pdf
Crystal say that the new devices need other values for the PLL circuit. There is however no application note for the new device.
The values mentioned in the datasheet are very likely NOT the real optimum values, as the values calculated with the application note are different from those in the datasheet.
So, what are the real optimum values for Rfilt, Cfilt and Crip?
For the old devices the values should as follows, assuming you want 44.1 kHz operation:
Rfilt = 7k5
Cfilt = 39 nF, X7R smd
Crip = 1000 pF, C0G smd
Is there anybody on this forum who knows how to calculate the values for the new devices?
thanks,
ABo