Hi all,
On the thread https://www.diyaudio.com/community/...citor-for-a-fet-input-amp.419886/post-7843781 there was an off-topic discussion about source impedance and op-amp stability. It is obvious to me that for an amplifier with series feedback at the input and shunt feedback at the output, a too high source impedance with the wrong phase has the same kind of impact as too low load impedance with the wrong phase, because they are in the loop gain equation in a similar way, but apparently everyone else disagrees. In order not to contaminate the other thread too much, I start this one.
Attached is an explanation of my point of view, which was also posted in the other thread. As I wrote it in the middle of the night and wanted to get some sleep, I took a couple of shortcuts. I'll try to fix that over the next couple of days.
The replies to it were:
Best regards,
Marcel
Edit: the latest and hopefully greatest version of the report is here: https://www.diyaudio.com/community/attachments/sourceimpedance-pdf.1382244/
On the thread https://www.diyaudio.com/community/...citor-for-a-fet-input-amp.419886/post-7843781 there was an off-topic discussion about source impedance and op-amp stability. It is obvious to me that for an amplifier with series feedback at the input and shunt feedback at the output, a too high source impedance with the wrong phase has the same kind of impact as too low load impedance with the wrong phase, because they are in the loop gain equation in a similar way, but apparently everyone else disagrees. In order not to contaminate the other thread too much, I start this one.
Attached is an explanation of my point of view, which was also posted in the other thread. As I wrote it in the middle of the night and wanted to get some sleep, I took a couple of shortcuts. I'll try to fix that over the next couple of days.
The replies to it were:
Best regards,
Marcel
Edit: the latest and hopefully greatest version of the report is here: https://www.diyaudio.com/community/attachments/sourceimpedance-pdf.1382244/
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When the non-inverting input is basically unterminated (high-Z) at the wrong frequency the intrinsic differential capacitance of the opamp has no "mass" to work against and thus it creates a lot of noise gain. And a rising slope of noise gain intersecting a falling circuit gain is bound to cause instability.
But the initial schematic is weak. You always place some shunt EMC capacitance (and ESD catch diodes) on a non-inverting input, actually even better two of them (one right at the connector, the other at the opamp pins, separated by some small series resistance or ferrite bead). If the capacitance is affecting the audio response, bootstrap it in that range.
And if there is a long cable which needs to be terminated to behave properly at RF then an AC terminator is a good option. Actually the snubbing resistance can be made a series element so we can have some filtering alongside with the termination.
Overall, I would basically agree to your analysis, @MarcelvdG. Source impedance matters on both input pins of an opamp, not only on the inverting input. Both want to see low impedance at RF, the non-inverting refering to the supplies (AC ground) and the inverting refering to the output.
But the initial schematic is weak. You always place some shunt EMC capacitance (and ESD catch diodes) on a non-inverting input, actually even better two of them (one right at the connector, the other at the opamp pins, separated by some small series resistance or ferrite bead). If the capacitance is affecting the audio response, bootstrap it in that range.
And if there is a long cable which needs to be terminated to behave properly at RF then an AC terminator is a good option. Actually the snubbing resistance can be made a series element so we can have some filtering alongside with the termination.
Overall, I would basically agree to your analysis, @MarcelvdG. Source impedance matters on both input pins of an opamp, not only on the inverting input. Both want to see low impedance at RF, the non-inverting refering to the supplies (AC ground) and the inverting refering to the output.
Input impedance is always at some level a function of load impedance and gain loop behavior (much less so if you buffer your input). Source impedance is rarely so high that this is a problem, usually a 100pF-1nF input shunt is enough to prevent step response issues. I used an RC shunt on the Kuartlotron to ensure stability, it works analogously to the L//R output network on power amplifiers.
Quick sim to illustrate the above, using datasheet spec of Cin_diff of 9.1pF for OPA1656:
So, when the unterminated cable had an impedance peak in the region around 4Mhz that is near or even above the 47k local resistor the circuit might oscillate.
Alternate view from noise gain perspective:
Without the "terminator", the noise gain explodes to 40dB. With the "terminator", it is reduced to the gain coming from the capacitance ratio (15p+9.1p)/15p = ~4dB.
Only at very high frequencies (>100Mhz) the 220R resistor causes a rise of noise gain again as it then starts to dominate the lower leg of the divider.
So, when the unterminated cable had an impedance peak in the region around 4Mhz that is near or even above the 47k local resistor the circuit might oscillate.
Alternate view from noise gain perspective:
Without the "terminator", the noise gain explodes to 40dB. With the "terminator", it is reduced to the gain coming from the capacitance ratio (15p+9.1p)/15p = ~4dB.
Only at very high frequencies (>100Mhz) the 220R resistor causes a rise of noise gain again as it then starts to dominate the lower leg of the divider.
Then noise does not allow for too high resistor values. Anyway, you have an effect of -IN node capacitance.
https://www.ti.com/lit/an/slyt087/slyt087.pdf
https://www.ti.com/lit/an/slyt087/slyt087.pdf
Quick question here, why did you put the 47k in series with the source? I’m thinking of an equivalent cart sourced impedance of 1.5k + 1.3H shunted by the 47k load.
On a separate but related topic, I consider the input filter on a power amp part of the compensation because the rise/fall time the front end sees means you can ensure the diff smp resins in the linear portion of its operating range and avoid it switching which leads to slewing. This of course has to be considered as part of the total compensation design, but the main point here is these things are are interlinked.
This was to estimate the worst case input impedance the circuit would see when the attached cable has an impedance peak, appearing as open circuit.
I could be all wrong with this, of course.
A step response anomaly may be obvious on an oscilloscope but invisible in a response chart. 1% overshoot is easily visible on an oscilloscope but is only 0.1db. If an amp has a gain of 40 but rises to 41 at 100KHz, you may see overshoot on the step response but it might not look bad on the response chart.
Similarly, even though the effect of input impedance is usually tiny, if your goal is perfect square waves then this might actually become an issue. Whether that is audible is someone else's call, but if your amp only has overshoot when there is a high or mild source impedance, this is worth looking at if it means you don't have to overcompensate the amplifier.
Similarly, even though the effect of input impedance is usually tiny, if your goal is perfect square waves then this might actually become an issue. Whether that is audible is someone else's call, but if your amp only has overshoot when there is a high or mild source impedance, this is worth looking at if it means you don't have to overcompensate the amplifier.
I agree with your point that the input network is part of the feedback due to the capacitance between the differential inputs.
My Dual turntable has a shorting switch. My experience is that the switch opening/closing being audible is usually caused by DC across the cartridge. Also, the Dual's motor damping capacitor is prone to failure, which leads to a loud pop when the power switch opens.
Ed
My Dual turntable has a shorting switch. My experience is that the switch opening/closing being audible is usually caused by DC across the cartridge. Also, the Dual's motor damping capacitor is prone to failure, which leads to a loud pop when the power switch opens.
Ed
The feedback to an LTP sees the positive input transistor as a common base stage, so the impedance connected to the base is part of the ~pole of that stage. I have seen an "input filter" effect the stability of an amplifier in simulation.
I think this is the resonance of the 47 kohm with the frequency-dependent negative resistance of the op-amp. The frequency should be proportional to 1/√R, so you get twice the frequency with a four times smaller resistance. A bit of shunt capacitance can damp it.
Attached is a new version of my report. I tried not to cut too many corners this time, I hope the result is more to @tomchr 's liking.
It doesn't answer all his questions, nor all the questions and remarks in this thread. I will come back to those later. It's close to 1 AM here now, and I really have to get some sleep.
It doesn't answer all his questions, nor all the questions and remarks in this thread. I will come back to those later. It's close to 1 AM here now, and I really have to get some sleep.
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I'm sure you can analyse it in terms of bootstrapping. In fact, I think I'm implicitly doing that when I calculate the input impedance, now in section 3.1. I calculated the input impedance because I found it easier to calculate the effect of a resonating source impedance that way than via loop gain analysis.
All in all, I think I agree.
Thanks for your comments. I have made the stability analysis a bit more explicit in version 2 of the report.
The combination of the resonator and the amplifier appears to form an oscillator, of course not the resonator on its own.
I disagree with that. The source impedance affects loop gain just like load impedance does, so it is also quite capable of affecting stability.
They are not my scope pictures, they are @JRA 's. JRA set the timescale such that you could see the entire bang, so too far zoomed out to see a 50 MHz or so oscillation. I don't know how wideband the scope was.
What effect is supposed to make offset voltage sensitive to shorting switches, why is it much worse for a fast CMOS op-amp than for a slower op-amp and why does an RC series network across the input solve it?
The bias current of the OPA1656 is much too small to cause a bang. I calculated that somewhere on the other thread.
I don't know what loop gain definition you use, but in section 2 of version 2 of my report, I use all circuit loop gain definitions I know of, and give or take a minus sign, they all give the same answer as I put in version 1 of the report.
Yes, 9.1 pF, also known as -350 j ohm at 50 MHz.
It isn't excluded by any of the definitions I know, and 350 ohm isn't all that much.
I introduced it to make the equation a bit simpler.
In section 2 of the new report, I show that a resistive source causes an extra negative real pole in the loop gain when the open-loop input impedance is capacitive, just like a capacitive load causes an extra negative real pole in the loop gain when the open-loop output impedance is resistive.
Actually, my claim is simply that source impedance can affect stability and that an input filter or an RC branch from the positive input to ground can therefore improve stability for certain source impedances. Whether that is true is independent of what loop gain definition you like to use.
Looks like this nails it.
Input impedance, with no shunt capacitance (green) vs 15pF (blue), and no parallel 47k:
Without the shunt the input impedance slope is second order and phase peaks near 180deg around the problem frequency, so effectively negative.
Alternate look at it, with the load resistor in place, and 200k (4x) this time, and stepping the shunt capacitance .01f 33f 100f 330f 1p 3p 10p 33p:
Frequency has halved and we see the negative'ish input impedance is pretty much cancelling the 200k completely.
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EDIT: and the moment I add a second pole (or a pole-zero) to the opamp's Aol things explode quickly....