Dear Friends,
I'm designing a simple AK4493S DAC and I'm struggling to understand why the analog filter in datasheet uses not symmetrical values for both phases. See the image attached.
Can someone explain to me how this filter works? Also the second set of filtering elements seem to be unusual with capacitors placement and two resistors per phase.
If there are books I can buy to learn more about analogue filters like that can you link them? I would be in your debt.
Best,
Somek
I'm designing a simple AK4493S DAC and I'm struggling to understand why the analog filter in datasheet uses not symmetrical values for both phases. See the image attached.
Can someone explain to me how this filter works? Also the second set of filtering elements seem to be unusual with capacitors placement and two resistors per phase.
If there are books I can buy to learn more about analogue filters like that can you link them? I would be in your debt.
Best,
Somek
Non-identical branches (with regard to impedance level, not the actual filter function) are used here because otherwise that filter topology would pose unequal loads to the source which is what AKM wanted to avoid here, but it is not ideal. One can use symmetrical branches when the output of the filter is changed to fully balanced with an additional inverter. See http://www.douglas-self.com/ampins/balanced/balanced.htm#5, figure 12 vs figure 9 for the concept.
The general design idea is the so-called second-order multiple feedback low-pass filter which was extended to balanced input. Google will give you enough texts to read but many are (obviously) math-heavy.
The general design idea is the so-called second-order multiple feedback low-pass filter which was extended to balanced input. Google will give you enough texts to read but many are (obviously) math-heavy.
Easy to work out at DC by inspection. For example, say if AOUTLP was at +2v then AOUTLN should be at -2v, given they should be equal magnitude but opposite sign. A divide by two voltage divider is formed by the two 300R resistors thus making the opamp noninverting input at +1v. In that case the inverting input will also be forced to +1v, if the opamp is not saturated. It means the voltage across the 910R resistor at AOUTLN is 3v so the output current is about 3.3mA. OTOH AOUTLP sees 600R to ground and since it is at +2v the output current is around 3.3mA. Thus the current flowing out of each DAC output is of equal magnitude. 🙂
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