Welcome to my first post!
As a music and electronics fanatic, I decided it was time to get rid of crappy music reproduction by my laptop computer due to cheap AC97 compatible AD conversion chips and a 3.5 mm stereo jack plug. Speakers and amplifiers are home built.
Since I am a student, I'm on a tight budget. Apart from that it is a learning experience for me. Being a pure analogue fan for years, I found out that digital signal processing still contains tons of analogue challenges 🙂
Therefore the idea rose to modify a CD player to suit my needs. The 227ESD has two TDA1541A's and a CXD1144A 18 bit digital filter. Oversampling is 8 times.
Steps to undertake:
- Receive SPDIF signal and convert to I2S
CS841X series do not offer re-clocking. This does not solve the jitter problem.
The DIR9001 can be used in XTI mode to receive SPDIF. Problem: The SONY uses a clock frequency of 16.9344 MHz, where the DIR9001 datasheet states the use of a 24.576 MHz clock. Can the DIR9001 be driven in XTI mode with a 16.9344 MHz clock? What happens when the CXD1144A and TDA1541A's are connected directly?
- Modify clock + local power supply
I intend to install a Tent clock for its low jitter when $$ allows it
- Modify analogue output stage + local power supply
OPA827 or discrete (DC-coupled)
- Modify volume control (ALPS blue velvet)
As added bonus, the cd player already has a motor drive potentiometer on board which can be remote controlled 🙂
-------------------------------
As for the jitter problem:
There appear to be five methods to eliminate jitter. The most promising methods (I think) are described below.
3.) Let the input data stream fill a FIFO buffer. The DAC is fed from a local low-jitter clock and the data comes from the buffer. Due to the separate transport and DAC clocks, the buffer will empty or fill up slowly, depending on which clock is faster. Thus, we must provide some means to slightly "tune" the local clock source to keep the buffer about half filled. Too bad it also is pretty complex...
4.) Use an Asynchronous Sample Rate Converter (ASRC) to completely isolate the timing of input data stream and DAC chip. This approach is cheap and easy, but there are some caveats. The AD1896 is a nice candidate for this method. (Can the DIR9001 be used when implementing AD1896?)
5.) Asynchronous reclocking right before the DAC (how about the digital filter?). A nice idea, cheap to implement and it works good > HOW, and what is the difference with method 3 and 4?
---------------------------------
So much for thinking this was an easy project... Reading forum posts just raises more questions.
The datasheet for the CXD1144A seems to be unfindable, just like the service manual for the CDP227ESD. I can measure out the most important pins, but it helps to have schematics.
Any help, comments and insights are welcome!
Doedolf
As a music and electronics fanatic, I decided it was time to get rid of crappy music reproduction by my laptop computer due to cheap AC97 compatible AD conversion chips and a 3.5 mm stereo jack plug. Speakers and amplifiers are home built.
Since I am a student, I'm on a tight budget. Apart from that it is a learning experience for me. Being a pure analogue fan for years, I found out that digital signal processing still contains tons of analogue challenges 🙂
Therefore the idea rose to modify a CD player to suit my needs. The 227ESD has two TDA1541A's and a CXD1144A 18 bit digital filter. Oversampling is 8 times.
Steps to undertake:
- Receive SPDIF signal and convert to I2S
CS841X series do not offer re-clocking. This does not solve the jitter problem.
The DIR9001 can be used in XTI mode to receive SPDIF. Problem: The SONY uses a clock frequency of 16.9344 MHz, where the DIR9001 datasheet states the use of a 24.576 MHz clock. Can the DIR9001 be driven in XTI mode with a 16.9344 MHz clock? What happens when the CXD1144A and TDA1541A's are connected directly?
- Modify clock + local power supply
I intend to install a Tent clock for its low jitter when $$ allows it
- Modify analogue output stage + local power supply
OPA827 or discrete (DC-coupled)
- Modify volume control (ALPS blue velvet)
As added bonus, the cd player already has a motor drive potentiometer on board which can be remote controlled 🙂
-------------------------------
As for the jitter problem:
There appear to be five methods to eliminate jitter. The most promising methods (I think) are described below.
3.) Let the input data stream fill a FIFO buffer. The DAC is fed from a local low-jitter clock and the data comes from the buffer. Due to the separate transport and DAC clocks, the buffer will empty or fill up slowly, depending on which clock is faster. Thus, we must provide some means to slightly "tune" the local clock source to keep the buffer about half filled. Too bad it also is pretty complex...
4.) Use an Asynchronous Sample Rate Converter (ASRC) to completely isolate the timing of input data stream and DAC chip. This approach is cheap and easy, but there are some caveats. The AD1896 is a nice candidate for this method. (Can the DIR9001 be used when implementing AD1896?)
5.) Asynchronous reclocking right before the DAC (how about the digital filter?). A nice idea, cheap to implement and it works good > HOW, and what is the difference with method 3 and 4?
---------------------------------
So much for thinking this was an easy project... Reading forum posts just raises more questions.
The datasheet for the CXD1144A seems to be unfindable, just like the service manual for the CDP227ESD. I can measure out the most important pins, but it helps to have schematics.
Any help, comments and insights are welcome!
Doedolf
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