I've designed and built a Maida with a mosfet and LT3080 - that seems to work really nicely. Now I'm looking at developing and building the power supply for my ADC (+15V,-15V, +5V) with the requirement for clocking around 24.756MHz too. I naturally have a large number of questions. The main questions I have are around the power supply - possibly the best option would be having a battery or capacitor bank to provide the ±15V 70mA and the +5V. I'd also create a second +5V supply for the digital side.
I came across this Jim Williams article: https://www.analog.com/en/technical...rement-for-a-low-noise-voltage-reference.html . The interesting piece in this article for me is the low noise power supply, grounding and shielding later on. I've also seen the use of LiPo on here (I'm aware of the issues).
So one option is to use either a bank of super caps or Duracell NiMH 9V D-cell rechargeable to power the ADC. I would probably prefer the supercapacitots and use a current limited power supply to charge, disconnect, then allow the caps to provide power through an LDO. For example an 18-20V super cap bank to give 15V seems reasonable. I could even use the current limiting SMPS bench supplies as the chargers.
For the LDO I was considering LT3045s which should handle 18V. I'd use separate cap banks for +18V, -18V and two +8-12V. The current draw for the ADC supplies would be <100mA each but the +5V digital would be powering a RPI at 2A hence would sendup taking a larger cap bank and parallel.
Has anyone done this already? Any experiences I could learn from?
I came across this Jim Williams article: https://www.analog.com/en/technical...rement-for-a-low-noise-voltage-reference.html . The interesting piece in this article for me is the low noise power supply, grounding and shielding later on. I've also seen the use of LiPo on here (I'm aware of the issues).
So one option is to use either a bank of super caps or Duracell NiMH 9V D-cell rechargeable to power the ADC. I would probably prefer the supercapacitots and use a current limited power supply to charge, disconnect, then allow the caps to provide power through an LDO. For example an 18-20V super cap bank to give 15V seems reasonable. I could even use the current limiting SMPS bench supplies as the chargers.
For the LDO I was considering LT3045s which should handle 18V. I'd use separate cap banks for +18V, -18V and two +8-12V. The current draw for the ADC supplies would be <100mA each but the +5V digital would be powering a RPI at 2A hence would sendup taking a larger cap bank and parallel.
Has anyone done this already? Any experiences I could learn from?