Hello Everyone,
Just got hold of a Peak Atlas DCA55 which is quite neat, but after running some test of the bunch of transistors I plan to use in my current project.
There are 2 sets of NPN/PNP at the output stage and I plan to use TIP41A/TIP42A and BDW93C/BDW94C.
Running the tests, the Vbe seems to be find and all well within +/-10%.
The issue is with hFE, while within the same batch they are all closed, but the hFE of NPN and PNP deviates a lot. eg. the hFE of TIP42s are approx 200 but the TIP42s are around 630; the BDW94C are about 26 and the BDW93Cs are all 37.
I did some reading on various forums and seems like matching hFE of NPN to PNP is not critical and almost impossible.
Is my understanding correct?
Just got hold of a Peak Atlas DCA55 which is quite neat, but after running some test of the bunch of transistors I plan to use in my current project.
There are 2 sets of NPN/PNP at the output stage and I plan to use TIP41A/TIP42A and BDW93C/BDW94C.
Running the tests, the Vbe seems to be find and all well within +/-10%.
The issue is with hFE, while within the same batch they are all closed, but the hFE of NPN and PNP deviates a lot. eg. the hFE of TIP42s are approx 200 but the TIP42s are around 630; the BDW94C are about 26 and the BDW93Cs are all 37.
I did some reading on various forums and seems like matching hFE of NPN to PNP is not critical and almost impossible.
Is my understanding correct?
I think you are right. The PNPs and NPNs drawing different base currents due to different Hfe should be expected, the offset you try to minimize is due to the difference between the two PNP pairs and the two NPN pairs, not the NPN VS PNP. This is because the offset is due to difference between input side and feedback side.
Perhaps a schematic of the part using the transistor pairs in question? I am assuming you are employing a NPN/PNP pairs as LTP in parallel going symmetrical to pos/neg rails...?
Perhaps a schematic of the part using the transistor pairs in question? I am assuming you are employing a NPN/PNP pairs as LTP in parallel going symmetrical to pos/neg rails...?
If these are output transistors, there's really no advantage in matching them. It is much better to chose the parts with the highest Hfe.
Jan
Jan
I believe the atlas dca also only tests with few mili amps, which is not a realistic load, the dca is great though for small signal
This is the output stage of one channel
Yes I think the test load is like 25mA