Kirksaeter Moderator 150.200 DC Offset and Bias

So I got this exotic and we'll sounding amp, it came with original user manual where the schematic is depicted (yet it was built with significant mods) but much is left to the operator.

Well, output stage is a push pull of parallel power transistors ( one channel has 8, between mje3055 and mje2955), and since this design is new for me, I'd like to ask how regulate DC offset (looks like I've got two pots per channel, totaling 4) and proper values for the bias (here i measured the emitter current through the emitter resistors as usual), which are nowhere to be found.

Please find attached a schematic ( remember, output transistors are paralleled, not depicted) and the actual board.

IMG_20220925_100933.jpg
Thanks
 

Attachments

  • IMG_20220918_144826.jpg
    IMG_20220918_144826.jpg
    399.3 KB · Views: 161
Hi Michelag,

since that design is a bridge, you would use R427 for zero offset measured between L420 and 0V for the the one complementary stage and for the 2nd, you would set R467 to zero volts measured between L460 and 0V. to be repeated for the right channel.

Proper bias - no idea. Maybe 100mA for a nice class B? You could check application notes for that type of power transistors or check other designs.
I'm having fun with my Kirksaeter every day 🙂

Best regards,

Markus
 
  • Like
Reactions: Michelag