So, I tested IDSS on a N channel jfet by shorting G and S, then applying a 6 volt battery through a 1K resistor, so that the Drain was positive with respect to source. Got a reasonable number.
By mistake, I did the same thing to a J74. Is this now fried? I would hope that the 1K resistor saved the day.
When testing a Pchannel device, should the drain and the source be grounded instead and a voltage that is positive be applied through a 1K resistor at the source with respect to the drain ?
By mistake, I did the same thing to a J74. Is this now fried? I would hope that the 1K resistor saved the day.
When testing a Pchannel device, should the drain and the source be grounded instead and a voltage that is positive be applied through a 1K resistor at the source with respect to the drain ?
for p-channel, the wiring of the test is the same; just reverse the polarity of the battery.
mlloyd1
mlloyd1
Well... there is doubt depending on what you did.
This is tricky to explain. In a JFET the D and S are interchangeable. However, the gate polarity must always be correct relative to the terminal you decide is the source. In other words you can swap D and S around and the device functions the same. Its symmetrical.
Your problem is that there could have been a direct path from Gate to either Drain or Source that would conduct with reverse polarity. I'm assuming the 1k was in the source lead. That would do nothing to stop the current in the forward biased gate channel. SO if enough current flows, the device could be impaired or damaged.
This is tricky to explain. In a JFET the D and S are interchangeable. However, the gate polarity must always be correct relative to the terminal you decide is the source. In other words you can swap D and S around and the device functions the same. Its symmetrical.
Your problem is that there could have been a direct path from Gate to either Drain or Source that would conduct with reverse polarity. I'm assuming the 1k was in the source lead. That would do nothing to stop the current in the forward biased gate channel. SO if enough current flows, the device could be impaired or damaged.
It lives! But not before burning a ground trace off an output board with some microscopic swarf pressing it's way between a diode and the heatsink. Ohm it out, no sweat. Give it an extra little twist to hold it down and it shorts...... So, I jumpered the ground trace and cleaned the heatsinks with nail polish remover.
Now being biased.
OMG are the bourns trim pots awful.
Now being biased.
OMG are the bourns trim pots awful.
It works because of the symmetrical nature of the device I mentioned.
Edit... I read that as thinks, not thnks 🙂
> a 6 volt battery through a 1K resistor,
Assuming the 1K is in the loop, the most you can put in an external device is:
6V
OR
6mA
Or
3V at 3mA which is 0.009 Watts.
A special case: a 0.6V forward diode will get 0.6V at 5.4mA.
Most JFETs are rated for 10mA gate current, and are in 0.3 Watt packages. Even if you got the gate diode forward, it should live.
Assuming the 1K is in the loop, the most you can put in an external device is:
6V
OR
6mA
Or
3V at 3mA which is 0.009 Watts.
A special case: a 0.6V forward diode will get 0.6V at 5.4mA.
Most JFETs are rated for 10mA gate current, and are in 0.3 Watt packages. Even if you got the gate diode forward, it should live.
Linear Systems has Erno's JFET papers archived on their website. Read first, ask questions later.
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