Hi all, this is my first thread on diyAudio. I don't know whether I post this thread here is appropriate or not. If not, please let me know.
I'm a newbee for HIFI audio. I was told the phase noise for MCLK of the DAC should be as low as possible. But for a typical phase nosie plot, there will be several number point on the plot from 1Hz, 10Hz, 100Hz, 1K, etc, and the phase noise's value would drop with the offset increasing. So here is the question: how to choose the right low and high integration limit to calculate the right jitter value. Is it correct to integration from 1Hz to 100kHz, or case by case?
BTW, If the phase noise performance is not so good, which performance will be sacrificed?
Thanks guys.
I'm a newbee for HIFI audio. I was told the phase noise for MCLK of the DAC should be as low as possible. But for a typical phase nosie plot, there will be several number point on the plot from 1Hz, 10Hz, 100Hz, 1K, etc, and the phase noise's value would drop with the offset increasing. So here is the question: how to choose the right low and high integration limit to calculate the right jitter value. Is it correct to integration from 1Hz to 100kHz, or case by case?
BTW, If the phase noise performance is not so good, which performance will be sacrificed?
Thanks guys.