Help needed for H-Bridge circuit

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There are a lot of unknowns here. C1 and C2 voltage rating ? polarity ? What happens when Q1 or 3 conduct. 240 V dc on negative end and 12 volt on positive end. Do you know what "Dead Time" is. It is VITAL that there is no overlap of conduction between the two halves of the bridge. Your Q and -Q driver should incorporate this. Its vital. The output from this circuit if it works is a square wave. 240 volts of this is not the same as 240V rms. (Form Factor).
Regards Karl
Edit Just spotted something else, D3 and D4, wont these cause a latch up, Q5 and 7 will explode I think. :hot:
 
The lower side transistors (Q2, Q4) seem OK.
The upper side (Q1, Q3) will never conduct, as there is about 12V on their gates, and their sources can't go up to more than about 8 Volts over ground.
You will need a much more sophisticated gate driver for the two upper halves of the bridge. Perhaps transformers or opto-coupled circuits.
 
Still don't get it, are you using C1 & D1 to increase the volts seen by the driver Q5. Can't work it out in my head, C1 negative end will see 240 volts DC, peak, every cycle, "average" 120 volts, what is the waveform across C1, is it at any time reverse biased. What is the average DC voltage on the positive end of C1. The diodes IN4007 certainly are not suitable, they switch far to slowly. You need high speed types for this kind of application, BY399 that kind of thing.
Have you simulated this circuit ?
 
Still not sure, diode D1 cathode will see 240+12, so I think you are right with the polarity, but it just does not "look right" What's the VCE rating of those drivers, and what voltage do R1 and R3 see when it's running. I still don't like D3/4 the potential for disaster seems ever present, particularly when running at HF and you get conduction overlap.
I give up , Build it see what happens 🙂 🙂
 
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