Then there are those who only want Chips in their amp.
www.passlabs.com/np/GC-SS-4a.pdf
In this case the output stage consists of both series and parallel
chip amps. The voltage sources you see introduce differential
DC offset between the two parallel chip amps, which allows
a DC bias current for the amps which can be set arbitrarily.
This DC bias is not seen by the load which sits beween the
output resistors. The damping factor remains high, as it is
enclosed by the GC input pair.
I leave it to you to decide what constitutes an acceptable
bias current for the chip amps.
Like the other versions, note the chip amps each having their
own local (nested if you like) feedback loops. Adjusting these
loops will give a wide range of performance/stability character.
As with version 3, we can easily arrange to invert the input
pin polarities of the chip amps, but that would be a trivial
variation after the first example.
There will be a prize for the first person to find a mistake
in any of the four.
😎
www.passlabs.com/np/GC-SS-4a.pdf
In this case the output stage consists of both series and parallel
chip amps. The voltage sources you see introduce differential
DC offset between the two parallel chip amps, which allows
a DC bias current for the amps which can be set arbitrarily.
This DC bias is not seen by the load which sits beween the
output resistors. The damping factor remains high, as it is
enclosed by the GC input pair.
I leave it to you to decide what constitutes an acceptable
bias current for the chip amps.
Like the other versions, note the chip amps each having their
own local (nested if you like) feedback loops. Adjusting these
loops will give a wide range of performance/stability character.
As with version 3, we can easily arrange to invert the input
pin polarities of the chip amps, but that would be a trivial
variation after the first example.
There will be a prize for the first person to find a mistake
in any of the four.
😎
Confused:
The input stage chips of 4a should have -/+, not +/-. I'm really confused.
And... and I clearly see the complexity inside Nelson's brain while he speaks out so simple. 🙂
The input stage chips of 4a should have -/+, not +/-. I'm really confused.
And... and I clearly see the complexity inside Nelson's brain while he speaks out so simple. 🙂
Pepper:
I see that the four output stage chips of 4a are utilized only with their half capacity at maximum. If so, 2a or 3a are more intersting potential projects?
And... and if it is full of emptiness inside his brain, he would speak out very much and long. 😎
I see that the four output stage chips of 4a are utilized only with their half capacity at maximum. If so, 2a or 3a are more intersting potential projects?
And... and if it is full of emptiness inside his brain, he would speak out very much and long. 😎
Hi,
paralleled chipamps haven't same AC input signal (or always same tracking difference) what means that one is dynamically loaded with very low impedance from another. This design doesn't look good to me, but maybe I'm wrong.
Regards
Milan
paralleled chipamps haven't same AC input signal (or always same tracking difference) what means that one is dynamically loaded with very low impedance from another. This design doesn't look good to me, but maybe I'm wrong.
Regards
Milan
jh6you said:
No, I believe that's correct. We just keep flipping the polarities
until it comes out. 😎
Red.hot.chilly.pepper:
The 4 inside should have the flipped polarities. Otherwise, I give up this project...??? Because of
.........................
The 4 inside should have the flipped polarities. Otherwise, I give up this project...??? Because of
.........................inverting topology
You need not give up.
As the 2nd OPA gets its inputsignal from the supply shunt resistor
of the first one the phase is 180°.
Imagine driving OPA1 with positive signal -> output gets positive
thus drawing current from PSU -> this in turn leads to more
voltage across that shunt -> this again leads to negative voltage
at the capacitor coupled input of the 2nd OPA -> Bingo!
Uli
jh6you said:Red.hot.chilly.pepper:
The 4 inside should have the flipped polarities. Otherwise, I give up this project...??? Because of
You need not give up.
As the 2nd OPA gets its inputsignal from the supply shunt resistor
of the first one the phase is 180°.
Imagine driving OPA1 with positive signal -> output gets positive
thus drawing current from PSU -> this in turn leads to more
voltage across that shunt -> this again leads to negative voltage
at the capacitor coupled input of the 2nd OPA -> Bingo!
Uli
Mist.on.my.shoulders:
I well arrive to your Bingo position. Thanks.
After all of that, where to where the supply currents of the second OPAs flow? From this point, my face starts to have harmonic distortion.
I well arrive to your Bingo position. Thanks.
After all of that, where to where the supply currents of the second OPAs flow? From this point, my face starts to have harmonic distortion.
PSU
As the 2nd OPA´s are directly coupled to the PSU
don´t care about this current as long as your PSU is
stable 😉 😉 😉
Uli
As the 2nd OPA´s are directly coupled to the PSU
don´t care about this current as long as your PSU is
stable 😉 😉 😉
Uli
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