I am building an input stage for a violin into an ADC. I’m using a PCB I have purchased which already has an opamp input buffer before a codec and ARM processor.
A problem with piezo pickups on violins is that, due to the way a bow acts on a string, they produce asymetric waveforms. This is not optimum for using the full headroom and bit depth of the ADC. Adding some phase shift helps to make the waveform more symetrical.
Some extra anti-aliasing filtering can’t be a bad thing and, also, the violin produces nothing under 200hz so no harm in losing response below there. Filtering below 200hz and above, say, 18khz would also give some phase shift to the signal which should help with the asymetric waveform.
I have some little JFET buffer PCBs. I thought I might use one as an input buffer, freeing up the opamp stage to be used as a simple filter. The two schematics are shown next to each other below.
Unfortunately I’m, um, no genius at electronics 😀
I can use an online calculator for a simple CR network but some of this looks a bit less straightforward to me. I’ll start at the beginning:
My piezo pickup is a capacitive voltage source. I understand how this creates a CR network with the 1M input impedance of the JFET stage. However, I do not know how the C1 input capacitor effects that?
I assume (oh dear) there is no point in having C2, from the JFET stage, along with C6 of the opamp stage? I could get rid of C6, leaving C2 to block DC between the stages. If I did that would C1 and R7 then be a simple CR network to easily work out the frequency response?
Is the purpose of C7 to lose some high frequency to ground? How would I work out the cutoff frequency there?
A few questions there and my understanding is relatively basic, appreciate any reply or further ideas! Cheers
A problem with piezo pickups on violins is that, due to the way a bow acts on a string, they produce asymetric waveforms. This is not optimum for using the full headroom and bit depth of the ADC. Adding some phase shift helps to make the waveform more symetrical.
Some extra anti-aliasing filtering can’t be a bad thing and, also, the violin produces nothing under 200hz so no harm in losing response below there. Filtering below 200hz and above, say, 18khz would also give some phase shift to the signal which should help with the asymetric waveform.
I have some little JFET buffer PCBs. I thought I might use one as an input buffer, freeing up the opamp stage to be used as a simple filter. The two schematics are shown next to each other below.
Unfortunately I’m, um, no genius at electronics 😀
I can use an online calculator for a simple CR network but some of this looks a bit less straightforward to me. I’ll start at the beginning:
My piezo pickup is a capacitive voltage source. I understand how this creates a CR network with the 1M input impedance of the JFET stage. However, I do not know how the C1 input capacitor effects that?
I assume (oh dear) there is no point in having C2, from the JFET stage, along with C6 of the opamp stage? I could get rid of C6, leaving C2 to block DC between the stages. If I did that would C1 and R7 then be a simple CR network to easily work out the frequency response?
Is the purpose of C7 to lose some high frequency to ground? How would I work out the cutoff frequency there?
A few questions there and my understanding is relatively basic, appreciate any reply or further ideas! Cheers
The JFET stage...
C1 is 'massive' compared to the typical capacitance of the piezo pickup and should have no real effect as such, however is it even needed seeing as the pickup is effectively an open circuit as far as DC is concerned.
The T072...
I'm afraid that's a non starter because the supply voltage is far to low for that opamp. 9 volts is about the minimum although there are low voltage opamps available. Remember that the supply places an absolute limit on voltage output and in practice many opamps will not swing fully between the rail. -/+ 2.5 volts output (which is the maximum from a 5 volt rail) is just 1.7 volts rms.
The input impedance is the parallel value of the two 1 meg ohms because the supply rail is effectively a 'short' between ground and +5 volts as far as supply impedance goes.
The input to the opamp must be AC coupled so at least one cap is needed, either C2 or C6. 1uF is plenty for what is a 500kHz input impedance. I wouldn't fit C1 on the opamp version. C2 will roll of the HF but not until way past the top of the audio band. It will be around -3db down at 160kHz
C1 is 'massive' compared to the typical capacitance of the piezo pickup and should have no real effect as such, however is it even needed seeing as the pickup is effectively an open circuit as far as DC is concerned.
The T072...
I'm afraid that's a non starter because the supply voltage is far to low for that opamp. 9 volts is about the minimum although there are low voltage opamps available. Remember that the supply places an absolute limit on voltage output and in practice many opamps will not swing fully between the rail. -/+ 2.5 volts output (which is the maximum from a 5 volt rail) is just 1.7 volts rms.
The input impedance is the parallel value of the two 1 meg ohms because the supply rail is effectively a 'short' between ground and +5 volts as far as supply impedance goes.
The input to the opamp must be AC coupled so at least one cap is needed, either C2 or C6. 1uF is plenty for what is a 500kHz input impedance. I wouldn't fit C1 on the opamp version. C2 will roll of the HF but not until way past the top of the audio band. It will be around -3db down at 160kHz
I'm saying that because as drawn you imply a single 5 volt rail is used with the opamp input biased to half supply.
Thanks for your quick reply Mooly.
Is it simply a case that, assuming we miss out the JFET stages C2, C6 makes an RC network with the input impedance giving:
2Π * inZ * C6 = 0.3183Hz ?
So if I wanted an fc of around 200Hz I could use around 1n6 for C6?
I guess a crux of my questions here is: Is it possible to cascade several RC networks, of LP and HP, together without a buffer in between them? In audio circuits I usually see buffers but, thinking about it, in power filters there are often a few RC networks cascaded like this.
Oh yeah, omitting it will mean the bias voltage will be up my cable and pickup but should make no odds to anything, it can't pass through the piezo itself.
I wondered about that. I checked the TL072 datasheet and it lists 5v as the minimum but I thought I would up it to 9v anyway for the extra headroom.
What do you mean by plenty? As in it will allow plenty of low frequency through?
Is it simply a case that, assuming we miss out the JFET stages C2, C6 makes an RC network with the input impedance giving:
2Π * inZ * C6 = 0.3183Hz ?
So if I wanted an fc of around 200Hz I could use around 1n6 for C6?
What would the original purpose of the opamps C1 be? Couldn't I use it to advantage as another filter stage?
I guess a crux of my questions here is: Is it possible to cascade several RC networks, of LP and HP, together without a buffer in between them? In audio circuits I usually see buffers but, thinking about it, in power filters there are often a few RC networks cascaded like this.
Ah, so it is making a filter stage with R7. For some reason I thought the fc there would depend on the resistance/impedance of the opamp, got it the wrong way round! So something around 9nf would give me an fc of around 18khz there.
Who cares?
You have what you have; if violin produces asymmetric waveforms, so be it.
You must fit the hat to the head and not viceversa.
See above.
Forget waveform symmetry, a violin is a violin.
I commercially make Musical Instrument amplifiers, from pickup to speaker and everything in between, and "you have what you have"
Scope that pickup and what you see on screen is the real signal.
I have made many Violin amplifiers, normally with 8" speakers, sometimes 2 x 6" ones, full range ones; 2 way types sound screechy by comparison.
Same with Sax amplifiers, waveform is also non symmetrical.
Electric guitars: same thing.
No need to strongly cut below 200Hz; just a mild cut below 100Hz is fine.
Main idea is not to deal with musical signal which as you say does not reach that low but to avoid thumps when Violin hits performer's shoulder or something.
A friend of mine even designed and sells a support system to hold Violin "in the air", by itself, not depending on performer.
https://supportlin.com
If anything, it saves him some neck pain 😄
C1 is only to separate Piezo pickup from OpAmp bias network, it's value may be, say, .01uF or so.
Try to use a good non.microphonic type (most of them), avoid a cheap ceramic there.
The actual low frequency cutoff will come from the Piezo pickup internal capacitance into the bias network, about 500k combined.
Yes, a single capacitor is enough.
In general yes, but a small value is enough, say 100pF.
Translated into actuality - use a C0G ceramic only, other types are very distorty. Cost is not the factor that matters.
Alas a piezo pickup is the same stuff as high-K ceramic caps and very distorty - but for an single-voice instrument that might not be too bad.
So my take on it 🙂
From what I remember of the TL0 series when used at low supply voltage was that the output could be limited in available voltage swing.
R1 * C1 = 1/ω = 1/ (2 π fc) which gives 0.318 Hz as you mention and 1.6nF for 200Hz
Why not have a play at simulating it 🙂 or at least your filters as a first step.
From what I remember of the TL0 series when used at low supply voltage was that the output could be limited in available voltage swing.
As you say, it will have an extended LF response.
R1 * C1 = 1/ω = 1/ (2 π fc) which gives 0.318 Hz as you mention and 1.6nF for 200Hz
I'm looking at that opamp stage as a generic 'building block' and adding capacitance directly at the input to ground can be a bit of an unknown because of the way it interacts with what could be an unknown output impedance of the stage driving it. Although it would not cause problems if fed from the JFET, it might cause issues if it ended up hung directly across say another opamp output stage. The 1k (R) and C7 give a much more precisely defined load on the stage driving it.
Yes you can do that but it all becomes more complex to analyse because each simple R/C stage assumes a near zero impedance driving it. If you cascade them then that isn't the case and the stages will interact somewhat.
Why not have a play at simulating it 🙂 or at least your filters as a first step.
Just for fun...
The JFET using a common device needs a tweak of the input bias. Severely distorted.
Much better:
The JFET and opamp using the same input source. Showing input voltage and the two outputs. JFET gain is slightly less than 1
Showing the roll off of that 1nF and 1k. The JFET stage would have no roll off (no filter) and it easily copes with 500kHz which was where I ran the simulation up to.
The JFET using a common device needs a tweak of the input bias. Severely distorted.
Much better:
The JFET and opamp using the same input source. Showing input voltage and the two outputs. JFET gain is slightly less than 1
Showing the roll off of that 1nF and 1k. The JFET stage would have no roll off (no filter) and it easily copes with 500kHz which was where I ran the simulation up to.
Me! I care 😀
With the asymmetric waveform I will effectively only be using a little over half of the bit depth of the ADC instead of nearly all of it. Yes, technically I'll still be using all of it, just using a different half of it on the up bow than the down bow! Making the signal symmetrical means it can have a higher amplitude before clipping, that should translate to lower SNR and effectively higher bit resolution.
The sound from a violin is not actually asymmetric. The violin string vibrates asymmetrically but the many many resonances of the body mess with the phase somewhat meaning the wave that hits the ear/microphone is not asymmetric. My project is to make an electroacoustic violin sound as close to possible as a real violin. Though the phase response has no effect on sound I don't think altering it could be a negative (though maybe it could be considered an indulgence)
Thankyou for your interesting reply though JMFahey 🙂
I have drawn the schematic in KiCAD now
I've done away with the input cap (and shall use c0g or good film caps following Mark Tillotson and JMFahey advice)
Upped the voltage to 9v following Mooly advice.
Swapped the cap, on the source output of the JFET, for a resistor (R4) to make an RC network with C1.
Tried to get some rough values for the components between the JFET and opamp.
Added the components after the opamp, from the DSP board schematic.
Unfortunately I can't seem to simulate it as KiCAD is complaining there is no shared ngspice library. There is, I just can't get it to see it. From a github issue I found this seems to be a Ubuntu problem, sigh. I will try and do it with one of these online circuit design sites, recommendations gratefully accepted.
Thanks for that Mooly. LTspice looks fun indeed and very informative, I shall try and get it installed