I am attempting to build a medium sized SMPS (200w). I want to use a uc3525 PWM IC as the controller. i have built a simple prototype circuit, and it produces a nice PWM wave at about 100khz. The problem i have been having for the last few hours, is about the feedback. Up until now, I have been using a pot. to feed the + side of the internal opamp (pen 2) a voltage between reference and ground. The - side of the opamp (pen 1)is connected to the compensation pen (pen 9) to make a simple buffer. All this works well, and an increase in voltage on pen 2 causes the pulse width to increase, just as it should. My question is, how should the uc3525 be wired so that an increase in feedback voltage causes the pulse width of the output to decrease?
Feed a fraction of the output voltage and a reference voltage to the error amplifier, in such a way that the error amplifier tries to make these two voltages equal by adjusting duty cycle automatically. For example, if you wanted a 30V output you would have to feed 1/2 of the reference voltage to the IN+ pin and 1/12th of the output voltage to the IN- pin (as 30=5*12/2).
If you want galvanically isolated feedback then you have also to make the IN+ pin sit at 1/2 Vref and use an optocoupler to feed a voltage proportional to the difference between the actual output voltage and the desired output voltage to the IN- pin.
If you want to use average current mode, then you can do the same but with measured output inductor current and desired current level (which should be set by another "servo" op-amp controlling output voltage).
Note that this is a very intuitive explanation because in any actual circuit stability issues will arise without additional frequency compensation and will have to be solved. That's because you are essentially placing a PWM-fed 2nd order filter (sometimes with more poles and zeros) in the feedback loop of an op-amp. The usual frequency compensation scheme for voltage mode employs a zero (series RC from op-amp OUT to IN-) placed at the resonant frequency of the output filter, so that Fr=1/(2*pi*sqr(Lout*Cout)), Fz=1/(2*pi*Rcomp*Ccomp) and Fz is close or slightly below Fr.
If you want galvanically isolated feedback then you have also to make the IN+ pin sit at 1/2 Vref and use an optocoupler to feed a voltage proportional to the difference between the actual output voltage and the desired output voltage to the IN- pin.
If you want to use average current mode, then you can do the same but with measured output inductor current and desired current level (which should be set by another "servo" op-amp controlling output voltage).
Note that this is a very intuitive explanation because in any actual circuit stability issues will arise without additional frequency compensation and will have to be solved. That's because you are essentially placing a PWM-fed 2nd order filter (sometimes with more poles and zeros) in the feedback loop of an op-amp. The usual frequency compensation scheme for voltage mode employs a zero (series RC from op-amp OUT to IN-) placed at the resonant frequency of the output filter, so that Fr=1/(2*pi*sqr(Lout*Cout)), Fz=1/(2*pi*Rcomp*Ccomp) and Fz is close or slightly below Fr.
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