External Clock with DIR1703 - HELP

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andreantunes

Member
Joined 2017
#1
Hi guys, I need some help here.

First of all, let me tell you I'm no techie. Just an enthusiast for music, sound and electronics with no deep knowledge.

I bought a XO2.2 module from Tentlabs to replace the 11.2896 crystal that sets the clock for the digital section on my Plinius CD-101 CD player.
The digital section of my CD player has a Burr Brown DIR1703 digital audio interface.
  • Followed the provided instructions from Guido from Tentalabs, installed the module and no audible difference.
  • Then I decided to measure the clock frequency on the digital section.
  • On the input XTi pin 8 of DIR1703 I have 11.289.583hz coming in from the XO clock module.
  • But on the output pin 4 of DIR1703 - SCKO - that sends the clock frequency to DF1706, etc all the way to the DAC chips - I get a deviation. I measure 11.297.397hz ( a 7.814hz difference !!!) all the way up to the DACs.
  • What I observed is that when the CD is NOT playing ( just idle) I get an accurate clock reading - 11.289.583hz - on the whole digital section up to the DAC chips. This means the input clock frequency is equal to the output clock frequency on DIR1703.
  • When the CD starts playing the clock frequency that comes out of pin4 of DIR1703 changes up to 11.297.397hz . And this clock frequency goes all the way up to the DAC chips.
  • If I hit the STOP button, frequency moves back to 11.289.583hz on the whole circuit.
  • I read the datasheet for the DIR1703.
    https://pdf.dzsc.com/DIR/DIR1703.pdf
    I believe the answer is there but it's too much tech language for me. For what I understand maybe the DIR1703 is set/configured to work with a crystal and maybe a workaround on the CKSEL can be the key? In my case pins 27 (UNLOCK)and 28 (CKSEL) are shorted. If lift one of the pins will I get the correct frequency?
I found a few other threads about the DIR1706 but found no similar problem or answer for this.

Basically I want the 11.2896.387 from the external clock to go all the way in the circuit.
Thank you all!

Andre
 
#2
Forgot to mention, this is the frequency I get on SCKO (system clock) with the original crystal
 

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#3
DIR1703 has PLLs in it. Probably what is happening when music is played back is that a PLL in DIR1703 is tracking the data coming in from the CD transport. If the transport is running a little slow, the PLL will have to adjust to the effective clock rate of the data being read in by the transport. Otherwise you would get glitches in the sound because the transport isn't locked exactly to the crystal clock oscillator frequency. The clock may be used as a reference to help stabilize the PLL, but from what you say the clock may not be doing more than that in this particular CD player design.

As an aside, personally I don't get why people keep using old CD players. Its possible to get far better SQ using a PC and a USB dac to play CD rips. That said, it may also be possible to get subjectively worse sound depending on particular implementation details.
 
#4
The DIR1703 is doing what it is supposed to do. When there is audio data MCLK is derived from the incoming data. When there is no audio data the attached clock is used to provide something for the downstream equipment to lock to prevent noise. Bit and serial clocks are provided but the data output is muted.
SCO.gif

The DOUT column says it all. The only time data isn't mute is when the SPDIF signal is present at the input in PLL mode.
 
#5
@andreantunes

If you want to run the DAC on your clock and have data received from S/PDIF, then you’ll need a ASRC (asynchronous sample rate converter) to re-calculate audio samples to match the DAC clock.

Or, in some cases, it is possible to provide external clock to the spdif signal source. In that case both source and sink will be synchronized.
 
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