Hello All,
My first post in this (or a) forum 🙂...
I'm working on a circuit where I discovered that the behavior in spice simulations is quite different from what I find in reality. Of course, this is no news to most here...
But my question is, maybe I'm missing something in the LTspice settings since my results are not even close to the diagrams I'm getting with LTspice?
Attached are the screenshots and .asc file used to give the overview.
I'm hoping somebody will share some insight here,
Best regards, Rens.
My first post in this (or a) forum 🙂...
I'm working on a circuit where I discovered that the behavior in spice simulations is quite different from what I find in reality. Of course, this is no news to most here...
But my question is, maybe I'm missing something in the LTspice settings since my results are not even close to the diagrams I'm getting with LTspice?
Attached are the screenshots and .asc file used to give the overview.
I'm hoping somebody will share some insight here,
Best regards, Rens.
Attachments
The power dissipation is far over the ratings.
I see that the threshold voltage is -1.5V in one model and -1.0V in the other. This parameter is not well-controlled.
Ed
I see that the threshold voltage is -1.5V in one model and -1.0V in the other. This parameter is not well-controlled.
Ed
Hello Jan, Hi Ed,
Thanks for your help. I’ll give that a try.
Ed, you’re right, however the used Vds and Vgs are exactly the same as in the datasheet, so I expected to get a simular diagram as per datasheet as a starting point.
@keantoken ; Would you be so kind and try shed some light on this subject?
BR. Rens.
Thanks for your help. I’ll give that a try.
Ed, you’re right, however the used Vds and Vgs are exactly the same as in the datasheet, so I expected to get a simular diagram as per datasheet as a starting point.
@keantoken ; Would you be so kind and try shed some light on this subject?
BR. Rens.
Last edited:
Yes, the @ flag sends an alert to said member.
Just like this @jan.didden
Just like this @jan.didden
Almost there, it's an automated process. 😉I’ll await the moderators confirmation of me being a human
Hi Rens - The circuit should be designed to tolerate variations in threshold voltage and Idss. A sample of transistors will show a range of values.
Ed
Ed
Didn't know trhat! Another learning day ;-)Yes, the @ flag sends an alert to said member.
Just like this @jan.didden
Jan
Hi Ed, you’re right there.
However, I’m hoping to get some more background on how the simulation is so far away from the datasheets. It’s absolute values, knee’s and slopes are all different, so I suspect I’m doing or am understanding something wrong here…
However, I’m hoping to get some more background on how the simulation is so far away from the datasheets. It’s absolute values, knee’s and slopes are all different, so I suspect I’m doing or am understanding something wrong here…
Your understanding is fine. The datasheet graph looks suspicious (Id has zero slope and quickly falls short of the square-law). The models don't try to represent varying device parameters.
Ed
Ed
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