I took the chance to make an opening thread. 😀
There are almost no examples of amplifier or preamplifier design using this option. I have experience with two designs so far.
Zero Signal Planes are PCB copper pours, which are connected to the ground at a single point. That way, there are no loop areas which could add EMI induced noise to the signal. Only downsides are that you have to use more expensive 4-layer PCB and there will be higher parasitic capacitances between signal tracks and ground.
Here is an example of output noise from my latest amplifier (measured with calibrated LNA), that will be published here in a week or so. Mains transformers are some 10 cm apart from the signal tracks, yet induced 50 Hz noise is only 700 nV.
There are almost no examples of amplifier or preamplifier design using this option. I have experience with two designs so far.
Zero Signal Planes are PCB copper pours, which are connected to the ground at a single point. That way, there are no loop areas which could add EMI induced noise to the signal. Only downsides are that you have to use more expensive 4-layer PCB and there will be higher parasitic capacitances between signal tracks and ground.
Here is an example of output noise from my latest amplifier (measured with calibrated LNA), that will be published here in a week or so. Mains transformers are some 10 cm apart from the signal tracks, yet induced 50 Hz noise is only 700 nV.
I would tend to go for a star grounded system without a ground plane for amplifiers.
For my USB oscilloscope I do use a copper pour but on layers 1 and 2 and connected to "GND" net.
For my USB oscilloscope I do use a copper pour but on layers 1 and 2 and connected to "GND" net.
It depends on what types of amplifiers you design. Long ground traces, compared to a ground plane, do not fair so well for an low level rf amplifier or very sensitive low noise amplifiers. generalizations on grounding have to be taken in context of the design specifics involved.
Considering that given example measurement is form the power amplifier with two 120 VA toroids in a cramped 3U x 300 mm case, 50 Hz noise magnitude is order or two lower than with standard design. In this design, PCB layers 1 & 4 are used as ZSP and inner layers 2 & 3 carry signal tracks.
On the PCB picture, single front plane connection is marked with arrow.
On the PCB picture, single front plane connection is marked with arrow.
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I should have it, it’s my design. 🙂
I will publish project soon. This is a 10 W class A, 2 MHz power bandwidth amplifier with 0.0000x (actually measured) distortion. But I’m waiting for the Cosmos ADC (in the local customs ATM) to be able to make precise measurements.
I will publish project soon. This is a 10 W class A, 2 MHz power bandwidth amplifier with 0.0000x (actually measured) distortion. But I’m waiting for the Cosmos ADC (in the local customs ATM) to be able to make precise measurements.
yes please publish it soon even without measurements!
looking at the PCB exicons as output buffer, some bjt or jfet as gain stage seems promising
OP amp is for servo? or for speaker protection with the relay?
looking at the PCB exicons as output buffer, some bjt or jfet as gain stage seems promising
OP amp is for servo? or for speaker protection with the relay?
Not for class A. It’s an usual 1/3 of nominal transformer power used, providing moderate transformer temperature and good load regulation.
Opamp is actual VAS stage. It has JFETs at input and sonically it is better than Toshiba JFET pair at the input. It is my preferred audio opamp – OPA828. Laterals are used as a diamond buffer follower, enclosed in the opamp NFB loop.yes please publish it soon even without measurements!
looking at the PCB exicons as output buffer, some bjt or jfet as gain stage seems promising
OP amp is for servo? or for speaker protection with the relay?
Some opamp measurements and opinions on OPA828:https://www.diyaudio.com/community/threads/opa828-opa2828-vs-opa627.400109/
At +-17 supply, there is no pressing need for loudspeakers protection.
So back on topic: Ground planes are generally a good idea to reduce area of loop antennas capturing RF noise.
Let us focus on frequencies far above 50Hz, several 100MHz or even GHz:
I am talking about cell phones.
Some years ago I discovered that my analog circuitry
was sensitive to my mobile and so I had to put it away several meters
to stop the disturbing noise.
Place your cellphone on top of your old Hi-Fi or tube-guitar-amp
and you know what I mean.
So, what is behind this annoying noise and what can we do about it?
Let me say first that I have been working as a hardware developer with a focus on EM-compliance
so I can give some background explanation here.
Your phone sometimes transmits bursts of high energetic radio signals,
i.e. a carrier that is about 100% amplitude modulated (AM).
Modulation frequency is several 100Hz square wave - thus unmistakable.
If you ever built a detector receiver, you know that
amplitude modulation can be simply demodulated using a diode.
Diving a bit deeper into theory, it can be shown that any non-linear element
is capable to demodulate AM - and that is the problem.
Any base-emitter-junction is non-linear,
non-linearity increasing with signal level.
Furthermore this applies generally to discrete analog circuitry
as well as to integrated op-amps etc.
As we are talking about frequencies far above 100MHz -
any negative feedback has vanished, the circuits operate open-loop.
And it is NOT helpful to consider specific slow devices,
because the demodulation works far above any transit frequencies.
The slow device only has to amplify the demodulated low frequency audio signal!
Keeping these things in mind, I reworked my design empirically -
exposing it to my cellphone in the cellar
where reception is weak forcing the transmitter to maximize output power.
After all, it boiled down to
-minimize loop areas
-use a zero GND plane with minimized slits in it (slit antennas!)
-insert damping resistors in series with any semiconductor pin that is prone to demodulation,
these are: Base- and collector-pins of BJTs, any input- and output-pins of op-amps etc.
These resistors dampen the series resonant tank
built by pcb-trace loop coil and input capacitance of nonlinear device.
Values are not critical, something between 100R ~ 1000R.
Meanwhile I added loads of these resistors to my designs
and can say that the improvement of cellphone immunity has been enormous.
Let us focus on frequencies far above 50Hz, several 100MHz or even GHz:
I am talking about cell phones.
Some years ago I discovered that my analog circuitry
was sensitive to my mobile and so I had to put it away several meters
to stop the disturbing noise.
Place your cellphone on top of your old Hi-Fi or tube-guitar-amp
and you know what I mean.
So, what is behind this annoying noise and what can we do about it?
Let me say first that I have been working as a hardware developer with a focus on EM-compliance
so I can give some background explanation here.
Your phone sometimes transmits bursts of high energetic radio signals,
i.e. a carrier that is about 100% amplitude modulated (AM).
Modulation frequency is several 100Hz square wave - thus unmistakable.
If you ever built a detector receiver, you know that
amplitude modulation can be simply demodulated using a diode.
Diving a bit deeper into theory, it can be shown that any non-linear element
is capable to demodulate AM - and that is the problem.
Any base-emitter-junction is non-linear,
non-linearity increasing with signal level.
Furthermore this applies generally to discrete analog circuitry
as well as to integrated op-amps etc.
As we are talking about frequencies far above 100MHz -
any negative feedback has vanished, the circuits operate open-loop.
And it is NOT helpful to consider specific slow devices,
because the demodulation works far above any transit frequencies.
The slow device only has to amplify the demodulated low frequency audio signal!
Keeping these things in mind, I reworked my design empirically -
exposing it to my cellphone in the cellar
where reception is weak forcing the transmitter to maximize output power.
After all, it boiled down to
-minimize loop areas
-use a zero GND plane with minimized slits in it (slit antennas!)
-insert damping resistors in series with any semiconductor pin that is prone to demodulation,
these are: Base- and collector-pins of BJTs, any input- and output-pins of op-amps etc.
These resistors dampen the series resonant tank
built by pcb-trace loop coil and input capacitance of nonlinear device.
Values are not critical, something between 100R ~ 1000R.
Meanwhile I added loads of these resistors to my designs
and can say that the improvement of cellphone immunity has been enormous.
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Zero Signal Planes are PCB copper pours, which are connected to the ground at a single point.
Also known as a shield.
Bucks bunny, I have run into the same problems you mention with EMC. I have also found LED bulbs and WIFI to be significant sources of EMI. I use 4 layer boards with signal and GND on top and bottom and signal and power planes internally. I try to maintain good integrity of the ground plane.
I also do not return large signal currents through the ground plane, and likewise high current to output transistor collectors and similar are not flowing through power planes. I route separately in those instances.
I use input and output damping resistors where appropriate.
I rely heavily on stitching GND planes together, but again there are no large currents flowing in the GND planes in my designs.
Tombo it would be interesting to see how you have routed internal layers if you care to share. Nice job!
I have done a number of discrete op-amp designs with diamond buffer outputs and live with a headphone amp (not my design) which uses same.
I also do not return large signal currents through the ground plane, and likewise high current to output transistor collectors and similar are not flowing through power planes. I route separately in those instances.
I use input and output damping resistors where appropriate.
I rely heavily on stitching GND planes together, but again there are no large currents flowing in the GND planes in my designs.
Tombo it would be interesting to see how you have routed internal layers if you care to share. Nice job!
I have done a number of discrete op-amp designs with diamond buffer outputs and live with a headphone amp (not my design) which uses same.
Class-D-amps single supplied, in BTL-mode
Let us have a look at the current flow through the bulk caps
in the single supplied full bridge configuration.
Each half wave of output sine draws the same current from the supply,
thus a 1kHz sine wave generates a full wave rectified 2kHz signal current flow -
containing loads of harmonics!
This current loops through the bulk caps close to the amp.
To reduce magnetic coupled noise into the input loops,
these output loops should be minimized as well.
I use two bulk caps with anti-symmetric pcb trace loop
trying to cancel the magnetic field.
This mechanism causes additional H2,H4.. distortion - and I am convinced that many amps with this so called "good distortion spectrum" just work that way.😉
Let us have a look at the current flow through the bulk caps
in the single supplied full bridge configuration.
Each half wave of output sine draws the same current from the supply,
thus a 1kHz sine wave generates a full wave rectified 2kHz signal current flow -
containing loads of harmonics!
This current loops through the bulk caps close to the amp.
To reduce magnetic coupled noise into the input loops,
these output loops should be minimized as well.
I use two bulk caps with anti-symmetric pcb trace loop
trying to cancel the magnetic field.
This mechanism causes additional H2,H4.. distortion - and I am convinced that many amps with this so called "good distortion spectrum" just work that way.😉
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@bucks bunny
Excellent and insightful on-topic post with advices from the experience. Thank you.
I’ve asked moderators for changing thread title to “Circuit design for EMI immunity”.
Excellent and insightful on-topic post with advices from the experience. Thank you.
I’ve asked moderators for changing thread title to “Circuit design for EMI immunity”.
@tombo56 thanks for the opening shot - I had asked Jason for this subforum!
I need to commenton your 1st post. With the xformers 10cm away, I wonder where those -123dBV hum spurs come from.
Since it also shows mains harmonics, which are produced by the rectifying process, it does look like it is due to sub-optimal wiring/routing and not 50Hz radiated.
What ye say?
Jan
I need to commenton your 1st post. With the xformers 10cm away, I wonder where those -123dBV hum spurs come from.
Since it also shows mains harmonics, which are produced by the rectifying process, it does look like it is due to sub-optimal wiring/routing and not 50Hz radiated.
What ye say?
Jan
I assume the secondary wiring with its higher currents is the noise emitter. Minimizing current loops and twisting these wires helps a lot.
Considering that given example measurement is form the power amplifier with two 120 VA toroids in a cramped 3U x 300 mm case, 50 Hz noise magnitude is order or two lower than with standard design. In this design, PCB layers 1 & 4 are used as ZSP and inner layers 2 & 3 carry signal tracks.
On the PCB picture, single front plane connection is marked with arrow.
View attachment 1218278
I'd give Q8 and Q9 a chance to get fully decoupled rails (especially in this case... a 2MHz bandwidth) by moving the (C11, C12 & C13) to the left and (C14, C15 and C16) to the right. Then, you'll have enough space to place the +V ingress point close to the Signal Gnd, and -V just underneath the Decoupling Gnd. You'll still have enough copper fill on L1 and 4 (do 2 rows of little vias... maybe..?)
The remainder of PS (low frequency) noise can (maybe...) be further reduced by carefully routing all the common returns back to the PS PCB paying strict attention to where you dump the speaker negative (returns). You'll need to experiment here... but if you share the photo(s), I will provide the pointers. You can PM me, if you wish.
Nevertheless, great design and thanks for sharing.
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