This is a flexible circuit that could be sized to work with power supply voltages from +/-9 to+/-35V and various output stage bias currents.
-Attached is a real measured example with +/-24V DC supply and 600 Ohms load.
-I didn`t tried it yet with cap. load, but with resistor loading as on schematic, there`s no oscillations, even without compensation cap... Compensation is another step but as it is now it works quite well.
-At startup there`s about 15-20mV max offset that goes to zero +/-2mV within a minute or two and it stays there.
-Attached schematic with measurements of distortion at various output amplitudes 2,4,10,20 and 40Vpp at 600 Ohms load.
-Attached is a real measured example with +/-24V DC supply and 600 Ohms load.
-I didn`t tried it yet with cap. load, but with resistor loading as on schematic, there`s no oscillations, even without compensation cap... Compensation is another step but as it is now it works quite well.
-At startup there`s about 15-20mV max offset that goes to zero +/-2mV within a minute or two and it stays there.
-Attached schematic with measurements of distortion at various output amplitudes 2,4,10,20 and 40Vpp at 600 Ohms load.
Attachments
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Any ideas for compensation?
On distortion vs frequency graph distortion rises after 2-3KHz with simple miller comp cap as expected, but when I tried few variations of TPC, measured data don't match the simulation...dist vs freq flattens out but 2nd harmonic is way higher. Very interesting, I'll post some measurement graphs later...
On distortion vs frequency graph distortion rises after 2-3KHz with simple miller comp cap as expected, but when I tried few variations of TPC, measured data don't match the simulation...dist vs freq flattens out but 2nd harmonic is way higher. Very interesting, I'll post some measurement graphs later...
Look at compensation in schematic 01 vs 02 measurements, anyone knows why is this happening? btw this is not the case in simulation. It's a proto board with wires all over the place but i don't think this is the problem. The circuit is not oscillating it's stable even without comp.cap.
Any hints?
Any hints?
A couple of things. BD140 and BD139. Did you actually use these? If you did, not the best choice.
Models for FETs in LTspice are not great.
Models for FETs in LTspice are not great.
A couple of things. BD140 and BD139. Did you actually use these? If you did, not the best choice.
Models for FETs in LTspice are not great.
No, it's KSA1229/KSC2690 on the proto board. .
Never mind the simulation, I'm trying to figure out some kind of TPC, to extend loop gain bandwidth and lower distortion at higher frequencies but I get "strange" measured results....second harmonic goes up and the values of RC are tricky to choose..
Any idea what to try?
loop BW is dominated by Q2: Ft/beta. so a high Ft Q2 helps, plus cascoding it to get rid of the VAs distortion
loop BW is dominated by Q2: Ft/beta. so a high Ft Q2 helps, plus cascoding it to get rid of the VAs distortion
I'll try 2SA1360 but I'd like to avoid cascode.
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Bogdan,
Are you saying that with a single lag comp of 56pF the performance at 20k is better than with TPC?
Wow, that's interesting.......
Hugh
Are you saying that with a single lag comp of 56pF the performance at 20k is better than with TPC?
Wow, that's interesting.......
Hugh
Bogdan,
Are you saying that with a single lag comp of 56pF the performance at 20k is better than with TPC?
Wow, that's interesting.......
Hugh
Yes Hugh the graph above is with standard compensation. Few values in the design are critical so lot more experiments to come...
To be continued.
Distortion gets lower as bias gets higher, due to low resistance feedback network, as usual in CFB circuits...
Don`t know what to do with this circuit, but I learned a few things 😀
When used as line stage on lower rails, the distortion is very low.
-measurement for 50Vpp 2nd and 3rd harmonic vs frequency:
Don`t know what to do with this circuit, but I learned a few things 😀
When used as line stage on lower rails, the distortion is very low.
-measurement for 50Vpp 2nd and 3rd harmonic vs frequency:
Attachments
Line Amplifier with +/-15V power supply, measurements for 4Vpp at 600 ohms load.
First two graphs are for R8-10K and other two graphs for R8-100R.
It`s interesting how critical value of that resistor is to the distortion and 2nd and 3rd harmonic relation. 🙂
First two graphs are for R8-10K and other two graphs for R8-100R.
It`s interesting how critical value of that resistor is to the distortion and 2nd and 3rd harmonic relation. 🙂
Attachments
So it's going to bi line preamplifier, I'll open new tread with all the information and data when I polish the design and try few more things..
Btw this won't be NHB (NeverHearedBefore) preamp, it will be NHE (NeverHearedEver) model, I won't listen to it untill I assemble both channels on the pcb 😀

Btw this won't be NHB (NeverHearedBefore) preamp, it will be NHE (NeverHearedEver) model, I won't listen to it untill I assemble both channels on the pcb 😀
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