Hello,
I wondered a small thing, why does every astable configuration is like this :
While this one allow a slightly less awkward layout (as most of the pins are on the same side of the DIP-8 chip, and in the proper order).
I guess there is a good reason for that, but I don't understand it.
Can you enlighten me?
Thank you very much
I wondered a small thing, why does every astable configuration is like this :
While this one allow a slightly less awkward layout (as most of the pins are on the same side of the DIP-8 chip, and in the proper order).
I guess there is a good reason for that, but I don't understand it.
Can you enlighten me?
Thank you very much
It is expected that the positive power supply includes considerably more noise, than ground. When you connect the noisy positive supply to a 555's timing capacitor, the capacitor directly couples that noise straight into the sensitive voltage comparator inputs (pins 2 and 6), creating timing uncertainty. OMG supply noise correlated jitter, we hate jitter!
Whereas connecting a 555's timing capacitor to ground ensures that any noise on the positive supply is attenuated by the R+R+C lowpass filter before being applied to pins 2 and 6. Far less timing uncertainty. Far less jitter.
Whereas connecting a 555's timing capacitor to ground ensures that any noise on the positive supply is attenuated by the R+R+C lowpass filter before being applied to pins 2 and 6. Far less timing uncertainty. Far less jitter.
The 555 is a very clever design. The lower and upper thresholds are set to 1/3 and 2/3 of Vcc. The voltage used to charge and discharge the capacitor switches between (almost) ground and Vcc. This makes the frequency independent of supply voltage.
However, the control voltage (pin 5) is often referenced to ground. Thus, the capacitor also has to be referenced to ground to avoid noise.
Ed
However, the control voltage (pin 5) is often referenced to ground. Thus, the capacitor also has to be referenced to ground to avoid noise.
Ed
The control voltage (pin 5) is usually decoupled to ground. The ground connection matches the timing capacitor.
If the control voltage is left floating, the 555 will be sensitive to supply noise regardless of which rail the timing capacitor is connected to.
Ed
If the control voltage is left floating, the 555 will be sensitive to supply noise regardless of which rail the timing capacitor is connected to.
Ed
When no bypass is used on pin 5, the 555 is mostly agnostic regarding the supply voltages (except for the reset which is Vcc referenced).
If you use a bypass cap connected to Vcc, connecting the timing cap to Vcc too makes sense
If you use a bypass cap connected to Vcc, connecting the timing cap to Vcc too makes sense
I seem to remember that the 555 produced potentially troublesome spikes when the timing cap was discharged (obviously depending on it's value) so the CMOS version was preferred.
Ironically the original 555 tends to create a large level of power and ground noise due to its shoot-through current pulses of 100+mA - CMOS variants of the 555 are way less noisy as they don't exhibit shoot-through. Art of Electronics recommends very large decoupling caps for the plain 555 to help tame this - or simply switch to a CMOS version such as the 7555.