This schematic came up in a conversation on another forum and it intrigued me so much that I drew it up in LTSpice and took it for a spin. It seems to perform vwell. I'm trying to understand the working principle and I think what look like current mirrors are actually working as common base amplifiers. But why? What's the idea behind a design like this? Anyone familiar with it?
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It looks like a variant of Peter Blomley's amplifier of the 1970's, see his Wireless World article.
Also check R43 and R47 in the SIM file.
When corrected the SIM become slow and distortion goes to
Partial Harmonic Distortion: 0.001162%
Total Harmonic Distortion: 0.229299%
Regards
When corrected the SIM become slow and distortion goes to
Partial Harmonic Distortion: 0.001162%
Total Harmonic Distortion: 0.229299%
Regards
...but it also kicked up the idle power to a toasty 15W. How do you even set the bias on this thing? R25 and R34, I assume?
The quiescent current is ideally the current through VT12 and VT14 times the mirror ratio set by R20 in parallel with R21 and the parallel value of R44 and R45, and their colleagues on the negative side.
1. BC556C and BC546C are only rated to 65V so +/-80V is a no-no.
2. We could use your red LED model.
3. Marcel's link didn't work but I found it here: https://keith-snook.info/wireless-w... to class-B Amplifier Design by P Blomley.pdf
4. It will take a lot of work to evaluate all the folded cascode and current mirrors but given the very complicated circuit and fair but not exceptional results, I'm not sure that I want to bother. Perhaps the schematic is a work of art, something I was guilty of in ~1973, but that doesn't mean it's a great design. Once you think of something clever that works, next you have to ask, what is the cost vs benefit.
2. We could use your red LED model.
3. Marcel's link didn't work but I found it here: https://keith-snook.info/wireless-w... to class-B Amplifier Design by P Blomley.pdf
4. It will take a lot of work to evaluate all the folded cascode and current mirrors but given the very complicated circuit and fair but not exceptional results, I'm not sure that I want to bother. Perhaps the schematic is a work of art, something I was guilty of in ~1973, but that doesn't mean it's a great design. Once you think of something clever that works, next you have to ask, what is the cost vs benefit.
Yeah, it's not that impressive (now that I fixed my simulation bugs). I was more interested in what the heck is going on and what made the designer make those choices. I just compared it to my pretty basic and unremarkable Blameless-inspired design and the latter beats the "Mirror Mania" on THD and bandwidth with half the number of transistors. Nonetheless, the design intrigues me.
R47 is connected to the wrong side of R43 in the simulation.
With all the cascodes and mirrors, and buffered gate drive, perhaps the objective was speed. But it's not that great and has a nasty spike at about 2MHz. If you want fast, it needs to be simple.
With all the cascodes and mirrors, and buffered gate drive, perhaps the objective was speed. But it's not that great and has a nasty spike at about 2MHz. If you want fast, it needs to be simple.
Ed is correct, I overlooked those. I thought it was just a product rule AB circuit using the loop VT12...VT15 to define how the current is split.
The quiescent current is ideally the sum of the currents through VT12 and R22 times the mirror ratio set by R20 in parallel with R21 and the parallel value of R44 and R45, and their colleagues on the negative side.
This amplifier has both a normal bias of ~230mA set by R18 and R19, and a minimum bias of ~60mA set by R22 and R23 (adjustable by the output mirror ratio).
VT9 and VT10 appear to make the transfer function somewhat hyperbolic.
I see a lot of transistors that need to be matched and kept at the same temperature.
Ed
VT9 and VT10 appear to make the transfer function somewhat hyperbolic.
I see a lot of transistors that need to be matched and kept at the same temperature.
Ed
The BCM84* and BCM85* series dual transistors are matched within 2 mV, but their maximum power dissipation is less than for the TO92 equivalents and the thermal coupling is not very good (presumably separate dies in one package). Two of the transistors in the translinear loop VT12...VT15 are cascoded, which helps to keep temperature differences small.
The circuit around VT9 and VT10 has a bias current that depends strongly on the supply voltage, and the strong local series feedback around VT9 and VT10 worsens the right-half-plane zero caused by their base-to-collector capacitances. I wonder if one can't replace this with something more elegant, using some sort of common-mode loop. Actually, the simplest approach would be to kick out one input differential pair and to replace either VT9 or VT10 with a current source.
The circuit around VT9 and VT10 has a bias current that depends strongly on the supply voltage, and the strong local series feedback around VT9 and VT10 worsens the right-half-plane zero caused by their base-to-collector capacitances. I wonder if one can't replace this with something more elegant, using some sort of common-mode loop. Actually, the simplest approach would be to kick out one input differential pair and to replace either VT9 or VT10 with a current source.
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