I'm working on a novel amplifier design in LTspice. I'm experimenting with cascoding the VAS transistor, but very often (seems to be kinda random) no current flows thru the VAS transistor and its cascode, or just a few pA. If the current gets started (for example by briefly placing a large voltage on the cascode base) then everything works fine. I have a vague feeling I've read about this somewhere before but can't remember. Is it a real-life issue or just an artifact of SPICE? What's the solution?
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Plot the voltage across R3, i.e., the voltage between Q6_emitter and -40V_supply. This might suggest some ideas about how the problem could be solved.
Thanks both for your replies.
Ah thanks Ed, that was the key bit of info I needed (but V4). Adding a diode solved the problem.
Actually some 500 mA (well above its maximum rating) will flow through Q6, but all through its base and emitter and none through its collector. The current Q3 supplies to the next stage during clipping needs to be limited somehow.
Yes, in the actual amplifier all that is taken care of. The circuit shown was just to demonstrate the issue, actually based on a sandbox that I had made to explore and understand differential amplifiers a little better. I was going nuts, because I had one version working perfectly, then when I changed from a standard current mirror to a Wilson mirror the whole thing would latch up. Of course I suspected the mirror, not some strange behaviour elsewhere. It took me 2 days to figure it out where the problem really lay.
Good thing you found it long before connecting expensive loudspeakers to a prototype amplifier!
Operating point analyses just converge to a DC solution, you never know which one if there are several. It's sheer luck when they converge to the most undesirable stable bias point.
Maybe you already do this, but it's generally a good idea to check start up, shut down and recovery from hard clipping. Sometimes circuits latch up, sometimes small-signal-stable circuits end up in some huge limit cycle oscillation, sometimes currents go through the roof and sometimes everything works fine.
Operating point analyses just converge to a DC solution, you never know which one if there are several. It's sheer luck when they converge to the most undesirable stable bias point.
Maybe you already do this, but it's generally a good idea to check start up, shut down and recovery from hard clipping. Sometimes circuits latch up, sometimes small-signal-stable circuits end up in some huge limit cycle oscillation, sometimes currents go through the roof and sometimes everything works fine.
Yes, I was worried about that! Who knows if it'll ever get built, but for sure that would let the smoke out...
That's a good point, I think it's easy to assume that there's only one solution.
I already have clipping behaviour as one of my regular tests. That has revealed a lot of weirdness that needed to be sorted out. Haven't tried start-up and shut-down behaviours yet, but that's a good suggestion!
My regime is something like this:
Mess around with the amplifier design
Check the bias point and adjust the output to near zero (I haven't implemented a servo yet)
Look at the closed loop frequency curve and adjust the Cdoms as needed
Do open loop analysis
Test distortions at various frequencies, power levels and loads
Look at a square wave
Check clipping behaviour
Rinse and repeat.
I now keep a journal of the changes so I don't lose my mind remembering which change did what. It's quite a laborious process but every time I take a short-cut I regret it later. I don't necessarily do all the tests with each change though, life's too short. But I do try to only change one thing at a time before re-testing.
I always use a resistor in series with Q3 collector to current limit it. With only 10 ohms + T4 E-B diode the current through T3 will destroy it by overload. Should limit the power in Q3 to 1w or less.
If you are planning current limit for the output you need current limit for Q8 too.
If you are planning current limit for the output you need current limit for Q8 too.
Remember this isn't the actual amp, just a sandbox for demonstrating an issue. In the actual amp, Q3 is limited by the VAS protection, but I'll think about it. Q8 is fed by current source Q7, so already limited.
A current limit for the output stage is usually made with a transistor that leads the input current for the output stage directly to the output. So with current limit in the output stage the input current to the current limit can be several 100 mA.
And for that you dont have a current limit at Q8.
Of course, if you are just testing a topology in spice it is much simplier without current limits.
But the resistor i proposed in series with Q3 C can change the high frequency behavour a bit so it is better to include that in your analysis.
And for that you dont have a current limit at Q8.
Of course, if you are just testing a topology in spice it is much simplier without current limits.
But the resistor i proposed in series with Q3 C can change the high frequency behavour a bit so it is better to include that in your analysis.
I decided that resistor is a good idea so I included in my design. Thanks for the suggestion! It didn't make much difference to the Bode plot so all is good.
My output stage is unconventional, so I don't have to worry about that here.