I've been working on a variation of the JLH symmetric headphone amplifier that is designed to address one of its original problems, which is the relatively large values of emitter resistors needed to get the auto-bias circuitry working. The thought occurred to me that the emitter resistor values could be greatly reduced if an additional current was extracted/injected from/into the base connection(s) of the current-regulating transistors. This would, in essence, add an offset to the base voltage so the output transistors' emitter resistors could be reduced in value.
First pass results (i.e., not worrying about drift due to temperature variations) looked pretty good but the circuit's phase margin wasn't very good. The JLH design is interesting because if you place capacitors between the output node and the input transistors' emitter you get something like this:
Not shown: the version here is using .5 ohm resistors on the output transistor's emitters, much smaller than the original JLH design..
Given the phase response plot now the subject line of my post should be clear. Feed-forward, pole-zero, however you want to classify it, those driver transistors plus the capacitors work a treat.
For a 1KHz input, a 0 dB fundamental on this circuit's output has a 2nd harmonic level that's about 120dB down from the fundamental. Not surprising, considering the high OLG of the OPA1656. I'm pretty happy that the amp is stable despite the huge overall gain. At least in simulation. The output transistors' idle current is about 140mA for that result. The rails are +/-15V
Here's a screenshot with the AC feedback loop restored:
Its bandwidth is WAY too high for my taste -- it's just asking for oscillation problems due to external parasitic coupling. But that's easy enough to address.
Just to repeat, I haven't checked to see how this approach works over temperature. The bias-control loop gain is lower compared to the original JLH design (due to the lower Re) so I certainly don't expect it to be better. But, given the fact that the bias control transistors' input dynamic resistance has to be the same as in the original JLH design (since their emitter currents are the same), maybe not enough of a difference to matter.
These are all simulations so real-world results will almost certainly be worse. However, I'm encouraged because the (simulated) transistors on the + and - sides are different in terms of device parameters, yet producing that level of distortion.
I have to say that I'm not all that crazy regarding the way the driver transistors are operated (w/regard to their emitter resistors' load voltages). It's a way to ensure relatively poor PSRR. There are relatively easy ways to address it, and I have already designed/built a variation on the original JLH HA that does just that -- using +/- 4V voltage regulators.
First pass results (i.e., not worrying about drift due to temperature variations) looked pretty good but the circuit's phase margin wasn't very good. The JLH design is interesting because if you place capacitors between the output node and the input transistors' emitter you get something like this:
Not shown: the version here is using .5 ohm resistors on the output transistor's emitters, much smaller than the original JLH design..
Given the phase response plot now the subject line of my post should be clear. Feed-forward, pole-zero, however you want to classify it, those driver transistors plus the capacitors work a treat.
For a 1KHz input, a 0 dB fundamental on this circuit's output has a 2nd harmonic level that's about 120dB down from the fundamental. Not surprising, considering the high OLG of the OPA1656. I'm pretty happy that the amp is stable despite the huge overall gain. At least in simulation. The output transistors' idle current is about 140mA for that result. The rails are +/-15V
Here's a screenshot with the AC feedback loop restored:
Its bandwidth is WAY too high for my taste -- it's just asking for oscillation problems due to external parasitic coupling. But that's easy enough to address.
Just to repeat, I haven't checked to see how this approach works over temperature. The bias-control loop gain is lower compared to the original JLH design (due to the lower Re) so I certainly don't expect it to be better. But, given the fact that the bias control transistors' input dynamic resistance has to be the same as in the original JLH design (since their emitter currents are the same), maybe not enough of a difference to matter.
These are all simulations so real-world results will almost certainly be worse. However, I'm encouraged because the (simulated) transistors on the + and - sides are different in terms of device parameters, yet producing that level of distortion.
I have to say that I'm not all that crazy regarding the way the driver transistors are operated (w/regard to their emitter resistors' load voltages). It's a way to ensure relatively poor PSRR. There are relatively easy ways to address it, and I have already designed/built a variation on the original JLH HA that does just that -- using +/- 4V voltage regulators.
Simulations with varying the temperature of the output transistors showed that the idle current doesn't have a strong temperature dependency as the output transistors warm up. That's important to prevent thermal runaway.
I also experimented with changing the outputs into darlington pairs. It was necessary to slightly change the currents used to generate the offset voltages in the autobias circuitry -- and it appears that the change didn't substantially change the simulated phase margin. I was surprised by that so some additional experiments are in order. The change of course increased the open loop gain, which further dropped the distortion.
I also observed that the opamp's DC level is sensitive to the balance between the positive and negative autobias settings. I had thought that it might be possible to use something like a single constant-current diode to source the offset current for both sides, but that appears to be a vain hope -- achieving overall balance means that the offset currents won't be. If realized as a real amplifier this does complicate the design.
I also experimented with changing the outputs into darlington pairs. It was necessary to slightly change the currents used to generate the offset voltages in the autobias circuitry -- and it appears that the change didn't substantially change the simulated phase margin. I was surprised by that so some additional experiments are in order. The change of course increased the open loop gain, which further dropped the distortion.
I also observed that the opamp's DC level is sensitive to the balance between the positive and negative autobias settings. I had thought that it might be possible to use something like a single constant-current diode to source the offset current for both sides, but that appears to be a vain hope -- achieving overall balance means that the offset currents won't be. If realized as a real amplifier this does complicate the design.