Hello
I have a marantz cd 84 cd player with a problematic DAC (Decoding) condition so it doesn't output audio. All button functions when playing, pause, FF , REW, Back and others on the display look normal. I have also checked all the JRC 4560 ICs for CD Out and Head Phone out, all are normal. The "mute" and "Kill" sections are also normal. Is there a father who is a digital audio expert who knows about this problem?
I once made a VCD Player using the Mpeg VCD kit by utilizing the Marantz CD-84 CD Player's EFM (RF) signal output and it worked.
Now I want to try to modify the normal EFM (RF) signal output that was converted to an external DAC but I don't know how.
Any digital audio experts know how to modify it
I look forward to a response from you guys here
Thank You.
I have a marantz cd 84 cd player with a problematic DAC (Decoding) condition so it doesn't output audio. All button functions when playing, pause, FF , REW, Back and others on the display look normal. I have also checked all the JRC 4560 ICs for CD Out and Head Phone out, all are normal. The "mute" and "Kill" sections are also normal. Is there a father who is a digital audio expert who knows about this problem?
I once made a VCD Player using the Mpeg VCD kit by utilizing the Marantz CD-84 CD Player's EFM (RF) signal output and it worked.
Now I want to try to modify the normal EFM (RF) signal output that was converted to an external DAC but I don't know how.
Any digital audio experts know how to modify it
I look forward to a response from you guys here
Thank You.
The CD-84 doesn't have I2S. I would suggest to trace the signals around the DAC chips and the previous SAA chips with an oscilloscope.
It is true but it can be done.
So the question still stands.
Please look at the chipset and their pin options.
So the question still stands.
Please look at the chipset and their pin options.
http://vasiltech.narod.ru/files/SAA7000.pdf
You can reed here the this chip is capable of delivering i2s and offset binary in 14 and 16 bit.
You can reed here the this chip is capable of delivering i2s and offset binary in 14 and 16 bit.
Actually this chip will generate the offset binary signal as it received 2’s complement in the first place.
Probably it could also be taken from the input already as there the signal is unprocessed 16 bit. I havn’t looked into it for some time now.
To force the SAA7000 i2s output signals you need to check the “gap” pin on the SAA7020 chip. It needs to be set correctly.
Probably it could also be taken from the input already as there the signal is unprocessed 16 bit. I havn’t looked into it for some time now.
To force the SAA7000 i2s output signals you need to check the “gap” pin on the SAA7020 chip. It needs to be set correctly.
