Hi Guys,
I am interested in designing an output stage to mitigate some of the high frequency crossover issues with the CFP topology. I have heard some mention of combining the CFP in parallel with an emitter follower stage.
Has anyone here used this in an amplifier before, how did you bias each pair of transistors and where there problems with one pair doing all of the work.
What are the best practices for designing with this stage?
I don't really know what I am doing but after some trial and error this is the general concept that I came up with.
I am hoping that this thread will lead to some interesting discussion, and if this has been talked about somewhere before please let me know.
Alex
I am interested in designing an output stage to mitigate some of the high frequency crossover issues with the CFP topology. I have heard some mention of combining the CFP in parallel with an emitter follower stage.
Has anyone here used this in an amplifier before, how did you bias each pair of transistors and where there problems with one pair doing all of the work.
What are the best practices for designing with this stage?
I don't really know what I am doing but after some trial and error this is the general concept that I came up with.
I am hoping that this thread will lead to some interesting discussion, and if this has been talked about somewhere before please let me know.
Alex
It’s been done - by Bryston. Except you don’t use Q11. Q3 drives both outputs (Q10 comes off it’s collector). Same thing on the bottom.
Yes that makes a lot more sense for driving the outputs. I have found the Bryston design you are referring to, and LTSpice gives some very low distortion for this design.
It appears that Bryston were matching the beta for all of the transistors in the OPS, I will have a go at building this with some spare transistors I have lying around at home and see how it performs but if the matching required is too stringent then I will probably not bother with building a full amp around this design.