Most people here will be familiar with the “Blameless Amp” by Douglas Self: Current source feeding degenerated LTP with current mirror load, ‘Darlington’ VAS working into Current source and driving either Darlington- or CFP-output. If the Miller compensation capacitor is split with a resistor from the middle point to the output, also called output inclusive compensation, it becomes the “Inclusive Amp”. So far so good – you can probably not get more performance from less parts.
People reading chapter 3 of Bob Cordell’s book, where he improves an amp step-by-step, will notice that the simple circuit evolves into the same topology before he ads pre-drivers, cascodes the VAS and then scales to higher power. I do not want to discuss the pros and cons of output triples and paralleling in the days of sustained gain transistors, or the “load invariant” principle, because this is about front ends from input to VAS.
But the question remains does the VAS cascode do any good? Would cascoding the input help even more, be it only by allowing faster lower voltage transistors in the LTP?
Or what about a push-pull VAS? There is a clever way to use one at the end of the MOSFET chapter (12) in Bob’s book, which avoids a double input stage by using a differential current mirror (and more cascoding). Some may have noticed the circuit is nearly identical to that in his HEC paper, apart from the OPS of course.
Now I finally come to the reason for this post. I had all those questions, plus some more, and was neither willing to populate ten perf boards, nor did I want to make ten layouts and pay for the prototypes. I spent a little more time to make a universal layout that allows testing different things selectable by jumpers (list below).
The output stage is on another board, with a connector to both ends of the bias spreader. Back when this was a company project for a customer, there were several board layouts that could be populated for Darlington, Triple or Quasi-Comp, for Diamond and for MOSFETs with and without HEC. Unfortunately, the project was cancelled, but my boss lets me continue on weekends to use up the parts and see what comes out (he used to be a HIFI enthusiast too). But again, this is only about the front end.
To allow stand-alone use, I added a class A follower with push-pull current source. This way the front end can be tested without wondering if an effect is caused by the output stage or its load. This test output can be jumpered into the feedback loop without connecting something to the VAS (one might increase the feedback divider values to keep distortion low). Also added are more possible ways of compensation.
Now this is the list of the jumpers and their function:
J1 Input DC-Coupling
J1 Feedback DC-Coupling
J3+4 IPS Cascodes On/Off
J5 IPS Current Mirror Simple/Differential
J6 IPS Lead/Lag Compensation
J7+8 VAS Current Source/Mirror (Simple/Differential VAS)
J9+10 Simple VAS (no EF = non 'Darlington')
J11+12 VAS Cascodes On/Off (J12 for Differential)
J13 Bias Spreader 2 On/Off (Driver Sense)
J14 VAS Mirror Cascode On/Off
J15 Miller Input Compensation
J16 (Classical) Miller Compensation
J17 Two Pole Compensation (+ J16)
J18 Transitional Miller = Output Inclusive Compensation (+ J16)
J19 VAS Shunt Compensation
J20 Class A Test Output active
The schematic is attached. Confusing at first, but a closer look lets you recognize the blameless topology (with half of the parts ignored), and the front end of Bob’s HEC paper. Notice it is mirrored, he used N-FETs in the LTP, which I converted to the usual PNPs. Many component values are examples or place holders, so please no discussion of dimensioning now.
Enjoy. Sample are ordered.
People reading chapter 3 of Bob Cordell’s book, where he improves an amp step-by-step, will notice that the simple circuit evolves into the same topology before he ads pre-drivers, cascodes the VAS and then scales to higher power. I do not want to discuss the pros and cons of output triples and paralleling in the days of sustained gain transistors, or the “load invariant” principle, because this is about front ends from input to VAS.
But the question remains does the VAS cascode do any good? Would cascoding the input help even more, be it only by allowing faster lower voltage transistors in the LTP?
Or what about a push-pull VAS? There is a clever way to use one at the end of the MOSFET chapter (12) in Bob’s book, which avoids a double input stage by using a differential current mirror (and more cascoding). Some may have noticed the circuit is nearly identical to that in his HEC paper, apart from the OPS of course.
Now I finally come to the reason for this post. I had all those questions, plus some more, and was neither willing to populate ten perf boards, nor did I want to make ten layouts and pay for the prototypes. I spent a little more time to make a universal layout that allows testing different things selectable by jumpers (list below).
The output stage is on another board, with a connector to both ends of the bias spreader. Back when this was a company project for a customer, there were several board layouts that could be populated for Darlington, Triple or Quasi-Comp, for Diamond and for MOSFETs with and without HEC. Unfortunately, the project was cancelled, but my boss lets me continue on weekends to use up the parts and see what comes out (he used to be a HIFI enthusiast too). But again, this is only about the front end.
To allow stand-alone use, I added a class A follower with push-pull current source. This way the front end can be tested without wondering if an effect is caused by the output stage or its load. This test output can be jumpered into the feedback loop without connecting something to the VAS (one might increase the feedback divider values to keep distortion low). Also added are more possible ways of compensation.
Now this is the list of the jumpers and their function:
J1 Input DC-Coupling
J1 Feedback DC-Coupling
J3+4 IPS Cascodes On/Off
J5 IPS Current Mirror Simple/Differential
J6 IPS Lead/Lag Compensation
J7+8 VAS Current Source/Mirror (Simple/Differential VAS)
J9+10 Simple VAS (no EF = non 'Darlington')
J11+12 VAS Cascodes On/Off (J12 for Differential)
J13 Bias Spreader 2 On/Off (Driver Sense)
J14 VAS Mirror Cascode On/Off
J15 Miller Input Compensation
J16 (Classical) Miller Compensation
J17 Two Pole Compensation (+ J16)
J18 Transitional Miller = Output Inclusive Compensation (+ J16)
J19 VAS Shunt Compensation
J20 Class A Test Output active
The schematic is attached. Confusing at first, but a closer look lets you recognize the blameless topology (with half of the parts ignored), and the front end of Bob’s HEC paper. Notice it is mirrored, he used N-FETs in the LTP, which I converted to the usual PNPs. Many component values are examples or place holders, so please no discussion of dimensioning now.
Enjoy. Sample are ordered.
I bet you had a lot of fun devising that and creating an implementation! Good luck and enjoy the laboratory time experimenting with it!
I'd like to inquire:
C24 - L1 - C27 appear to form an LC resonator circuit, could that be so? Its response to a stepfunction of load current might include sinusoidal ringing?
I'd like to inquire:
C24 - L1 - C27 appear to form an LC resonator circuit, could that be so? Its response to a stepfunction of load current might include sinusoidal ringing?
The chokes are axial types with 10 Ohm resistance, which is 7 times higher than the reactance at 230Hz (calculated resonance frequency), which is 1.4 Ohm for both L1 and C24. Any ringing will be 7x overdamped. Any load step will be low milliamps anyway.
But I will test for it thanks. One can always polulate 10R resistors for the chokes.
But I will test for it thanks. One can always polulate 10R resistors for the chokes.
Excellent, I agree with you that 10 ohms of resistance in the choke will give a very overdamped second order linear system, and no ringing whatsoever. Thanks for the reply & best wishes!