I have designed a board with a STM32H7 and USB and I2C DAC and ADC. But what clock crystal should I use?
The USB needs 48Mhz, and I want a common sample rate like 44.1khz 48khz or max 96khz. And something that can get somewhat close to the 480Mhz maximum core rate.
14.7456Mhz crystal could have worked is the frequency of the core could get a high value.
Or is a impossible mission? Maybe I can't get a common sample rate and have to resample the audio to compensate.
Any idea?
The USB needs 48Mhz, and I want a common sample rate like 44.1khz 48khz or max 96khz. And something that can get somewhat close to the 480Mhz maximum core rate.
14.7456Mhz crystal could have worked is the frequency of the core could get a high value.
Or is a impossible mission? Maybe I can't get a common sample rate and have to resample the audio to compensate.
Any idea?
Depends what you're trying to do with it. 44.1kHz is only used for Red Book, if you don't need that use 48kHz.
I have designed a board with a STM32H7 and USB and I2C DAC and ADC.
Maybe I2S?
But what clock crystal should I use?
You need any crystal as HSE, from which you can get the necessary USB frequency (48MHz).
And also the audio clock oscillator, connected to CK_IN (PC9), feeding I2S or SAI.
Better to use two oscillators (or one dual frequency) to have both 44.1x/48x sample rates.
P.S.If you need a sound quality, of course 🙂
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Maybe I2S?
You need any crystal as HSE, from which you can get the necessary USB frequency (48MHz).
And also the audio clock oscillator, connected to CK_IN (PC9), feeding I2S or SAI.
Better to use two oscillators (or one dual frequency) to have both 44.1x/48x sample rates.
P.S.If you need a sound quality, of course 🙂
Altor,
You got some really interesting products on your website - especially the JKGEN 🙂
We struggle to generate low distortion DSD tests tones in the lab, We have the DSD option fitted to a UPV, but have lost the interface pod - and R&S want over GBP2500 just for a small pod!!!
Your site mentions an pending update to the design, will it support higher DSD rates? and can you provide FFT plots of the DSD output so we can get an idea of residual distortion / NF?
For a long time I've been considering developing an affordable jitter analyser - maybe we could work together on the design ...
Sorry for the off topic post...
Altor,
We struggle to generate low distortion DSD tests tones in the lab, We have the DSD option fitted to a UPV, but have lost the interface pod - and R&S want over GBP2500 just for a small pod!!!
Your site mentions an pending update to the design, will it support higher DSD rates? and can you provide FFT plots of the DSD output so we can get an idea of residual distortion / NF?
Up to DSD512, but only PCM signals are generated in realtime, for DSD-signals there is not not enough CPU speed to do this, so it play samples from memory.
For a long time I've been considering developing an affordable jitter analyser - maybe we could work together on the design ...
Sorry for the off topic post...
You mean measurement jitter of the clock sources? My friend made something, but I don't now what was at the end. Will ask him.
Maybe I2S?
You need any crystal as HSE, from which you can get the necessary USB frequency (48MHz).
And also the audio clock oscillator, connected to CK_IN (PC9), feeding I2S or SAI.
Better to use two oscillators (or one dual frequency) to have both 44.1x/48x sample rates.
P.S.If you need a sound quality, of course 🙂
Thank you for your helpful answer. Yes you are correct, I use I2S and not I2C.
Can you expand on using two oscillators, do you talk about using two clock sources on I2S_CKIN (PC9) to select from?
Thank you for your helpful answer. Yes you are correct, I use I2S and not I2C.
Can you expand on using two oscillators, do you talk about using two clock sources on I2S_CKIN (PC9) to select from?
I am working on smillar project, i use gpio to select clock based on audio source. You can find many different approach to switch between differen clock sources.
By the way curren st library support max 96Khz for usb audio which is far away from market expectations.
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