Hi,
I've got two synchronous SPDIF-like sources coming from the same equipment.
Each source goes into a separate WM8804.
The sources are synchronous. Does it make sense to run one WM8804 in Master mode, and one in Slave mode? The idea being that there's only one PLL, so my two recovered data outputs will be in sync (and will have common BCLK and LRCLK).
If so .. according to the datasheet, BCLK and LRCLK on the slave device become inputs. This seems to be borne out by my own experiments - those inputs float, waiting to be driven.
I'm using Hardware mode, to keep it simple.
I'm setting up:
SDIN/HWMODE = 0 (hardware mode)
SCLK = 0 (slave mode)
CSB/GPO1 = 0 (SPDIF output will be taken from SPDIF RX, although I'm not actually needing that)
GPO0/SWIFMODE = 0
SDOUT/GPO2 = 1 (pullup 10k) .. together these two select 24 bit I2S
RESETB = 1 (pullup 10k)
and bringing LRCLK and BCLK across from the master device.
I'm not seeing any output .. am I doing anything obviously wrong here?
I've got two synchronous SPDIF-like sources coming from the same equipment.
Each source goes into a separate WM8804.
The sources are synchronous. Does it make sense to run one WM8804 in Master mode, and one in Slave mode? The idea being that there's only one PLL, so my two recovered data outputs will be in sync (and will have common BCLK and LRCLK).
If so .. according to the datasheet, BCLK and LRCLK on the slave device become inputs. This seems to be borne out by my own experiments - those inputs float, waiting to be driven.
I'm using Hardware mode, to keep it simple.
I'm setting up:
SDIN/HWMODE = 0 (hardware mode)
SCLK = 0 (slave mode)
CSB/GPO1 = 0 (SPDIF output will be taken from SPDIF RX, although I'm not actually needing that)
GPO0/SWIFMODE = 0
SDOUT/GPO2 = 1 (pullup 10k) .. together these two select 24 bit I2S
RESETB = 1 (pullup 10k)
and bringing LRCLK and BCLK across from the master device.
I'm not seeing any output .. am I doing anything obviously wrong here?
Further update: the slave device needs MCLK too, so I'm bringing that across.
MCLK = 25 MHz (approx)
BCLK = 12.5 MHz (approx)
LRCLK = 192 kHz
The Master device is sync'd up with source A, and is producing PCM data on DOUT.
MCLK = 128Fs .. is that correct / OK for the slave device
Slave device not happy.
Does the slave device still need a crystal oscillator? I would have thought not, because it's got MCLK. But I may be mistaken and the data sheet is not helpful on slave config.
MCLK = 25 MHz (approx)
BCLK = 12.5 MHz (approx)
LRCLK = 192 kHz
The Master device is sync'd up with source A, and is producing PCM data on DOUT.
MCLK = 128Fs .. is that correct / OK for the slave device
Slave device not happy.
Does the slave device still need a crystal oscillator? I would have thought not, because it's got MCLK. But I may be mistaken and the data sheet is not helpful on slave config.
Looks like it does. Data sheet says there always has to be a signal on XIN for the PLL to run, even if it's a CMOS level signal.
Looks like MCLK, BCLK, LRCLK only drive the I2S interface ..
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Hello, I'm experimenting a bit with the WM8804 that’s on the hifiberry digi+ to use it with i2s (this includes MCLK) from the Kali FPGA FIFO.
I set it to hardware config mode / slave mode (those config pins are brought out to the GPIO header).
This is custom, and not how hifiberry intended it to be used.
It does still work *without* it’s 27MHz crystal (pulled it).
Hard to tell from the datasheet if the PLL is needed at all, does it fall into a less performance mode without the crystal?
Thinking about un-powering the PLL next, but will need to lift a pin— no nice way to do it elsewhere on the board.
Does anyone know more detail about this?
Thanks!!
In the vid that's me disconnecting/connecting the MCLK:
https://www.youtube.com/watch?v=zlqgAvFvsYs
TLDR;
Does the WM8804 internal PLL need power while in slave mode & MCLK present (i2s-->spdif)?
I set it to hardware config mode / slave mode (those config pins are brought out to the GPIO header).
This is custom, and not how hifiberry intended it to be used.
It does still work *without* it’s 27MHz crystal (pulled it).
Hard to tell from the datasheet if the PLL is needed at all, does it fall into a less performance mode without the crystal?
Thinking about un-powering the PLL next, but will need to lift a pin— no nice way to do it elsewhere on the board.
Does anyone know more detail about this?
Thanks!!
In the vid that's me disconnecting/connecting the MCLK:
https://www.youtube.com/watch?v=zlqgAvFvsYs
TLDR;
Does the WM8804 internal PLL need power while in slave mode & MCLK present (i2s-->spdif)?
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That is an interesting concept. I think it should work, however, while the clock signals will be synchronized, the output data samples might not be exactly synchronized. Meaning, it's concievable that the two sample streams may be off by +/- one sample due to internal buffering and output register loading of the slave device. The internal PLL of the slave still needs to run, I would think, in order to for the biphase mark encoded S/PDIF data to be decoded, but perhaps somehow that's not true.
Ken, you're right .. that's exactly what a pair of WM8804's does. I tried syncing them by bringing them out of reset together, but there's still a small chance they are in bit sync but not word sync. It might be possible to use software to flush the buffers to get them in sync, but it may be easier to simply buffer them separately in two software FIFOs.
Kali i2s to SPDIF how to?
Dear sckramer,
I came across you relatively old post regarding WM8804 usse to generate spdis from Kali recloker.
I am trying to do the same, but have a small issue, and don't know how to fix it.
Dear all, I am using KALI for a long time to send i2s I have a project to convert i2s from Kali to spdif. This way one can try any external DAC through the standard coax digital interface.
The main problem is this I2S to spdif converter need to work in SAVE mode
I tried this board
Connecting 4 i2s signals from KALI. It works, but sound a bit distorted… it has strange high pitch noise in the background, especially when plays some fortepiano music.
image
Any idea how to convert KALI i2s to SPDIF with good results?
Thank you.
Dear sckramer,
I came across you relatively old post regarding WM8804 usse to generate spdis from Kali recloker.
I am trying to do the same, but have a small issue, and don't know how to fix it.
Dear all, I am using KALI for a long time to send i2s I have a project to convert i2s from Kali to spdif. This way one can try any external DAC through the standard coax digital interface.
The main problem is this I2S to spdif converter need to work in SAVE mode
I tried this board
Connecting 4 i2s signals from KALI. It works, but sound a bit distorted… it has strange high pitch noise in the background, especially when plays some fortepiano music.
image
Any idea how to convert KALI i2s to SPDIF with good results?
Thank you.