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Reference DAC Module - Discrete R-2R Sign Magnitude 24 bit 384 KHz

Not as much as I expected, but the used ADC is apparently not good enough, not precise enough and have too much noise.... I'm still looking at ADCs. But the biggest advantage is that I now can used less precise resistor, which simplify logistics and make performance more consistent from unit to unit....

Cool feature! Couldn't the noise be somewhat reduced by temporal averaging? Is the calibration procedure audible or is the output switched off in some way?
 
So when you’ve settled on a final calibration scheme will we see an OEM or DIY (or both?) version? Any idea of ballpark time frame?

Great to see you’re updating them.

My problem is I have three boards.... Currently. I'm learning towards doing the dam1021 first, keeping the formfactor and adding features, then the dam1941....
 
I can see the reasoning. I prefer the 1121 - I don’t think I’m alone in saying that those who have heard both the 1021 and 1121 prefer the 1121. So my preference would be the 1121 first :) but the only request I’d like to make would be that there be pin compatibility and dimensional compatibility of the pins so as to allow a straight swap of the new boards into existing 1021 and 1121 installations. Some of us have PCBs into which we plug the DAMs.

Is the XMOS chip on the 2541 a 216 or 208?

Another plug for the 1121 is the ability to choose your own input and power supply. I like having the option of, for example, isolators or no isolators on the inputs, not being ‘forced’ to use an onboard power supply, maybe even connecting a fiber optic-to-i2s board from the modem/switch to the 1121. After all, it is a DIY board.

I’ve sometimes wondered if the 1121 would not have sold more than the 1021 if it had been introduced first. But, as I said, I can understand why you might update the other boards first.

Please don’t forget us 1121 adherents, though :)
 
Ditch the 1021? It's still not working as advertised and needs a firmware update to properly reject incoming jitter.

I bought 17 of those, for over 4000 bucks ...

So as far as I'm concerned, fixing the clocking on the 1021 should be A priority. New hardware can come later.

I have just got my dam1021 and now I have to run it to measure the phase noise (or jitter if you prefere).

How do you think the clocking could be fixed to reject the incoming jitter?
With firmware update?
If so please explain how the firmware could affect the jitter.
 
+1

Ditch the 1021, develop the 1121 and the 1941. This gives freedom (1121) or a better chance for success (1941, built in USB with paralysed clock)

But if I knew your sales figures I would probably think different...

//

Actually, I consider the dam1021 more important, despite it being a DIY board I have more volume customers on it....

Maybe I will keep all three boards, thanks to the calibration I don't need to have separate -05 and -12 versions.... The dam1021 and dam1121 will also then sound the same, as all boards will be more like each other....
 

TNT

Member
Joined 2003
Paid Member
I have just got my dam1021 and now I have to run it to measure the phase noise (or jitter if you prefere).

How do you think the clocking could be fixed to reject the incoming jitter?
With firmware update?
If so please explain how the firmware could affect the jitter.

The PLL is implemented in software. It doesn't effect the clock itself but the utilisation of ejat is at hand can be improved.

//
 

TNT

Member
Joined 2003
Paid Member
Actually, I consider the dam1021 more important, despite it being a DIY board I have more volume customers on it....

Maybe I will keep all three boards, thanks to the calibration I don't need to have separate -05 and -12 versions.... The dam1021 and dam1121 will also then sound the same, as all boards will be more like each other....

So in a HW revision of the 1021 you would introduce re-clocking behind the fpga also in the 1021?

//
 
The PLL is implemented in software. It doesn't effect the clock itself but the utilisation of ejat is at hand can be improved.

//

The PLL is the one of the SI570, and from its datasheet it looks like there is not much margin to tune it.
As you know the bandwidth of the PLL strongly affects the phase noise.

Maybe to remove the incoming jitter one should remove the Si570?