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Buffalo III - flexibility without compromise.

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Register setting switch mappings for Buffalo III

Buffalo III on-board controller register settings I have so far:

In all cases 0 is open and 1 is closed.

SW1

switches 1 and 2 will for a two bit register for setting the modulator depth
00 = 6 bit
01 = 7 bit
10 = 8 bit
11 = 9 bit;

switch 3 is used to set true(0) or pseudo(1) differential mode.

switch 4 sets fast(0) or slow(1) filter roll-off mode.

Switches 5 and 6 choose DPLL bandwidth
00 default (best adaptive)
01 will be lowest
10 will be medium
11 will be highest

Switch 7 will control DPLL BW x 128 feature. This is handy for locking on even difficult I2S sources.
0 = normal
1 = * 128 mode

Switch 8 will enable or disable auto-detection of SPDIF sources. Some very high sample rate PCM/DSD sources can confuse the SPDIF detection scheme and so for some of those sources it is better to turn off SPDIF detection to avoid issues.

0 = normal
1 = No SPDIF detection

The second switch - SW2 is assigned as follows

Pins 1 and 2 are used to select SPDIF sources when using SPDIF mux. These two switch should be left open when using the remote switch module (more on that later) to select sources. We also have a small 4 input spdif board which is designed to mate with the Bufallo III. Along with a module call "sidecar" that allows you to switch between PCM/DSD sources and SPDIF.

all of the other switches on SW2 can be used.

Some possibilities:

1) Switching between PCM modes (not limiting to just I2S).
2) Switching between DSD modes
3) turning off OSF
4) turning of jitter eliminator

Any other ideas? Now is your chance to speak up! :)

Cheers!
Russ
 
Last edited by a moderator:
Good features, Russ!

I would like to see:
3) turning off OSF
4) turning of jitter eliminator

Implemented.
Thanks!


/S

Buffalo III on-board controller register settings I have so far:

In all cases 0 is open and 1 is closed.

SW1

switches 1 and 2 will for a two bit register for setting the modulator depth
00 = 6 bit
01 = 7 bit
10 = 8 bit
11 = 9 bit;

switch 3 is used to set true(0) or pseudo(1) differential mode.

switch 4 sets fast(0) or slow(1) filter roll-off mode.

Switches 5 and 6 choose DPLL bandwidth
00 default (best adaptive)
01 will be lowest
10 will be medium
11 will be highest

Switch 7 will control DPLL BW x 128 feature. This is handy for locking on even difficult I2S sources.
0 = normal
1 = * 128 mode

Switch 8 will enable or disable auto-detection of SPDIF sources. Some very high sample rate PCM/DSD sources can confuse the SPDIF detection scheme and so for some of those sources it is better to turn off SPDIF detection to avoid issues.

0 = normal
1 = No SPDIF detection

The second switch - SW2 is assigned as follows

Pins 1 and 2 are used to select SPDIF sources when using SPDIF mux. These two switch should be left open when using the remote switch module (more on that later) to select sources. We also have a small 4 input spdif board which is designed to mate with the Bufallo III. Along with a module call "sidecar" that allows you to switch between PCM/DSD sources and SPDIF.

all of the other switches on SW2 can be used.

Some possibilities:

1) Switching between PCM modes (not limiting to just I2S).
2) Switching between DSD modes
3) turning off OSF
4) turning of jitter eliminator

Any other ideas? Now is your chance to speak up! :)

Cheers!
Russ
 
IIR bandwidth? That would require 2 positions.
De-emphasize? That would require 2 positions.
And how about the mono settings: left/right, mono/8-channel? Would those be required, or are they controlled by the jumpers at the bottom?

Yes I meant to mention IIR bandwidth. That will definitely be added.

The auto de-emphasis only applies to SPDIF and it only ever turns on if it is maked as present in the SPDIF protocol. So there is no harm in leaving it on.

Yes as far as output summing etc goes, that has to be handled via the jumpers. There is no way around that. :)
 
1)PCM mode would be more useful if it did not require 32 bit frames...
2)There is notch delay and phase delay (I have no idea what they do but they are available as register settings)
3)Are there any undocumented registers? :)

1) That would be part of the PCM setting scheme. I can only make it support whatever the chip will support so will need to double check the DS.

2) notch delay is useful in some modes, I may allow changing it if I have any switches left. Dustin and I talked about its effect and in all cases it is minuscule. So its not a high priority.

3) Yes. But people trust me to keep things confidential so I will. :)
 
It would be GREAT to move all those DIP switches to the front panel on rotary/rocker switches. So freak at least, while almost everybody can only choose volume and source, you could be able to change IIR, OSF, etc.
Not that you will really need those controls, but the important thing is TO HAVE THEM :)
To be able to control each parameter right on the front panel, that freakin' exclusivity.
 
It would be GREAT to move all those DIP switches to the front panel on rotary/rocker switches. So freak at least, while almost everybody can only choose volume and source, you could be able to change IIR, OSF, etc.
Not that you will really need those controls, but the important thing is TO HAVE THEM :)
To be able to control each parameter right on the front panel, that freakin' exclusivity.

You could do that no problem. That is what the IO header is for. You would just have to run a ribbon cable or wire to the switches :)
 
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