This is very interesting and unexpected at least for me, but of course makes lot of sense.
I mean, in the real world devices will heat up locally (not the circuit as a whole) and experience temperature variations dependent on actual signal levels and mechanical installation details.
This is not usually modeled except for families of simulations or Monte Carlo analysis with temperature as variable, but then for the whole assembly which may yield results different from those where only local sections of the circuit are actually subject to temperature variations.
Ideally a dream simulator may allow for on the fly power disipation results be coupled with thermal models as designed or set as design info, from which junction temperature is determined and input to simulation.
Out of ignorance I presume this type of simulation (local individual component temperature dependence) is not usually analyzed. I this true?
Rodolfo
Hi Edmond,
Thanks.
Whenever I see a SPICE model with parameters that have more than two or three significant digits I assume that it has been rather brainlessly created.
BTW, I sometimes suspect that they try to create the SPICE models just from datasheet curves. Unfortunately, the datasheets usually do not have enough information over a wide enough range to extract a decent model from.
Cheers,
Bob
Here are Thermal Time Constants for Cubes of Silicon
0.1 micron => 116 picoseconds (emitter-base thickness of modern bipolars)
1 micron ===> 11.6 nanoseconds (modern biCMOS can be this small)
10 micron ==> 100*11.6nS = 1,160nS = 1.16 microsecond
(you can squeeze several active elements into this area, getting good tracking)
100 micron => 100*100*11.6nS = 116,000nS = 116 microseconds
(modern opamps, and many small signal discrete transistors)
1,000 micron => 100^3 * 11.6nS = 11.6 milliSeconds
(this is 40 mils on a side, about what first generation OpAmps needed)
10,000micron (1cm) => 100^4 * 11.6nS = 1.16 seconds
(this is active size of many system-on-chip products)
To compute these, use Specific Heat, Thermal Conductivty, and Mass of silicon.
The useful name "thermal timeconstant" is obscured by the
title "thermal diffusivity" of the chemical properties community.
0.1 micron => 116 picoseconds (emitter-base thickness of modern bipolars)
1 micron ===> 11.6 nanoseconds (modern biCMOS can be this small)
10 micron ==> 100*11.6nS = 1,160nS = 1.16 microsecond
(you can squeeze several active elements into this area, getting good tracking)
100 micron => 100*100*11.6nS = 116,000nS = 116 microseconds
(modern opamps, and many small signal discrete transistors)
1,000 micron => 100^3 * 11.6nS = 11.6 milliSeconds
(this is 40 mils on a side, about what first generation OpAmps needed)
10,000micron (1cm) => 100^4 * 11.6nS = 1.16 seconds
(this is active size of many system-on-chip products)
To compute these, use Specific Heat, Thermal Conductivty, and Mass of silicon.
The useful name "thermal timeconstant" is obscured by the
title "thermal diffusivity" of the chemical properties community.
Has anybody indicated thatn HEC isn't negative feedback?
HEC is, in fact, a combination of a negative feedback loop and a minor loop positive feedback loop.
The gain generated by the positive feedback loop is merely throttled down by the major negative feedback loop.
Which implies that a conventional user of a datasheet doesn't have enough information to work with ...
Has anybody indicated thatn HEC isn't negative feedback?
HEC is, in fact, a combination of a negative feedback loop and a minor loop positive feedback loop.
The gain generated by the positive feedback loop is merely throttled down by the major negative feedback loop.
Hi Mike,
Yes, it is correct to view HEC as an architecture that ultimately employs negative feedback. The simple explanation of HEC where a couple of summers are arranged to show the "error correction" aspect of it can be readily re-drawn to show an explicit positive feedback loop within a negative feedback loop. The loop gain of that positive feedback loop is nominally +1, implying that it is an infinite gain element embedded in the forward path of the negative feedback loop. Vanderkooy and Lipshitzed showed this many years ago. Indeed, this way of looking at HEC underlines the need for feedback compensation of this loop.
The "error correction" way of looking at HEC underlines the interesting optimum trimming attribute of this arrangement.
This was a long thread, and it was pointed out at several points along the way that different ways of looking at HEC can be useful, but that one must never ignore the reality of the need for compensation and that there is no free lunch.
Cheers,
Bob
Which implies that a conventional user of a datasheet doesn't have enough information to work with ...
If a datasheet is all you have, then you can at least create a model that is more workable than some out there. The datasheet that results may not be as comprehensive as we'd like, but may still be better and more reliable than some of the commercially-supplied models. When creating a model, it is always important to sanity-check the performance of the model against the datasheet curves. Of course, some datasheets are far more comprehensive in the data they supply than others.
Cheers,
Bob
I think most datasheets are developed from semi-automated testing of real sample devices. However, even in such testing sometimes the results achieved for some of the parameters can be off a bit; or they need to be inferred from a combination of other measured results. There are numerous sources of error even when real devices are measured.
Here is a simple example. Suppose you try to measure Early voltage or transistor output impedance in a DC situation. Let's say we measure collector current as a function of collector voltage for a given nominal collector current operating level. Unless the measurement is done with rather short pulses, the junction heats up more for higher collector voltages due to higher instantaneous dissipation, leading to higher beta and higher collector current that may not be a result of the Early effect. The time constant of junction temperature for small-signal transistors can be quite small.
Sometimes manufacturers will contract this stuff out as well. Moreover, the creation of SPICE models for their transistors is often contracted out and done in a highly automated "fitting" process that can lead to SPICE parameters that may be a decent fit to the data but which don't make a lot of physical sense.
Often, transistors need to be measured over a very large current range to properly separate out the various effects, and they may often not be measured over the many decades necessary to do so.
Overall, the datasheets are not bad in most cases, but the corresponding SPICE models are not always that trustworthy. Some manufacturers are mush better than others in regard to their SPICE models. OnSemi is certainly not one of my favorites.
Cheers,
Bob
Good morning Bob Cordell I am an 18 years old guy and I have been designing a complete HI-FI system. Now I would like to know your opinion about my design and where it can be improved.
This is the link to the project:
Design of a power HI-FI system
This is a video of a complete channel of the HI-FI system
power HI-FI system - YouTube!
Waiting your opinion, best regards.
This is the link to the project:
Design of a power HI-FI system
This is a video of a complete channel of the HI-FI system
power HI-FI system - YouTube!
Waiting your opinion, best regards.
Research output stage with a corrector Hawksfords shown that it is necessary to adjust so that the output impedance of the cascade was negative, for example equal to the resistance of the speaker wires. In this case, wires are compensated for distortions arising from the emf speakers.
Although the distortion obtained in this case is higher than in a properly balanced output stage, but the sound quality with strong wins.
Although the distortion obtained in this case is higher than in a properly balanced output stage, but the sound quality with strong wins.
I concur - excellent work Davide, not only because you are so young, but also because you had the passion and ambition to take this project from design to the final implementation. Even if it has nothing really new, I'll take such projects anytime over some half baked simulation that never gets to see a PCB.
I know that R76 and R68 are helping, but I still wonder how stable the VAS bias current is.
I know that R76 and R68 are helping, but I still wonder how stable the VAS bias current is.