Updates:
Schematic now in LTspice: http://www.diyaudio.com/forums/solid-state/238429-my-new-vas-topology-8.html#post3558788
Hi guys.
In recent years I've been trying to improve on the VAS. Not just modifying existing topologies but I've tried to actually work out a new topology based on the traits I wanted. In short, I've been simulating it for a while now with excellent results. But I've feared taking the plunge and design a PCB and prototype it right off. It would be too risky, something that's not been built and dimensioned before (at least by me). So I decided to actually go ahead and breadboard it and boy I'm glad I did.
The traits I were after were:
-High bandwidth
-Optimal connection to a single ended inputstage's push-pull output
-Active VAS current bias to rid of temperature and device invariances.
The standing current is programmable by a voltage reference (diode, bandgap reference etc) and a sense resistor. A low frequency integrator sets the mirrored conducting current of the input devices. The cool thing is that both the bias process and the actual HF VAS process don't 'see' each other at all; it does not affect THD (simulated).
The schematic isn't overly complex but it's pretty large still. I have to figure out a way to partition it while still making it easy to understand.
The breadboard contains the single ended inputstage (using BF245A as input devices for now), the VAS gain block, bias control and an output buffer follower so I can employ NFB without loading the VAS. All devices are BC550C/BC560C.
I've been running square waves to test and I've been able to optimize it achieving all the traits. The bandwidth is numerous times higher than I achieved with MF80, a basic symmetrical push pull design. There is a roll-off filter of 8MHz.
I've made a few pictures for you to judge, a 1MHz, 200KHz and a 20KHz square wave and a picture of the mad scientist's project
The 1MHz square is still full-power.
Thanks for reading if you got this far
Schematic now in LTspice: http://www.diyaudio.com/forums/solid-state/238429-my-new-vas-topology-8.html#post3558788
Hi guys.
In recent years I've been trying to improve on the VAS. Not just modifying existing topologies but I've tried to actually work out a new topology based on the traits I wanted. In short, I've been simulating it for a while now with excellent results. But I've feared taking the plunge and design a PCB and prototype it right off. It would be too risky, something that's not been built and dimensioned before (at least by me). So I decided to actually go ahead and breadboard it and boy I'm glad I did.
The traits I were after were:
-High bandwidth
-Optimal connection to a single ended inputstage's push-pull output
-Active VAS current bias to rid of temperature and device invariances.
The standing current is programmable by a voltage reference (diode, bandgap reference etc) and a sense resistor. A low frequency integrator sets the mirrored conducting current of the input devices. The cool thing is that both the bias process and the actual HF VAS process don't 'see' each other at all; it does not affect THD (simulated).
The schematic isn't overly complex but it's pretty large still. I have to figure out a way to partition it while still making it easy to understand.
The breadboard contains the single ended inputstage (using BF245A as input devices for now), the VAS gain block, bias control and an output buffer follower so I can employ NFB without loading the VAS. All devices are BC550C/BC560C.
I've been running square waves to test and I've been able to optimize it achieving all the traits. The bandwidth is numerous times higher than I achieved with MF80, a basic symmetrical push pull design. There is a roll-off filter of 8MHz.
I've made a few pictures for you to judge, a 1MHz, 200KHz and a 20KHz square wave and a picture of the mad scientist's project
The 1MHz square is still full-power.Thanks for reading if you got this far
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Thanks! During building the circuit I learned the finer details of the tuning mechanisms besides the more obvious like Cdom. The circuit has cascoded VAS devices. The following mechanisms I've found:
-Cdom1: Across output cascodes, determines speed of VAS rail.
-Cdom2: Feedback cap across output and VAS input (single ended, inverting input)
-Rfb: Influences, togeter with Cin of inputstage the transfer speed between output and input
-Re1: Degens resistors of input stage, speed of input stage.
-Re2: Degens of VAS input devices, speed of VAS input stage.
By adjusting all of these, trying to tune the speeds of stages so the 'previous' stage is as fast or slightly slower than the stage before, I've been managing to remove over/undershoot as much as I could. I could remove the input filter and it would still be stable but it would show some ringing as it then becomes too fast for the circuit to follow.
It's been quite an adventure pushing and pushing the performance of the circuit. Even the rail litics are needed to retain stability, their effects are clearly visible on the scope, as well as the decoupling elcos across the zener references for the cascodes so their bases can draw the instanious current.
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Hi Bigun
I have no idea how to go about that. I had already been prepping the schematic for publication together with the explanation. I don't think my craft is *that* special to warant a patent though but it's a nice thought I'm just excited the schematic works so well. I put it back into the simulator and it still retains its performance inspite of the changes. (Out with mosfets, in with BJTs). It does < 0.0005% THD 200K. I can't get it any better or faster.
In the end though it's the output stage that will slow down the whole thing but with a buffered MOSFET drive, the OPS can be made rather fast too. Too bad I can't hook it up with an output stage and put it to the test
I have no idea how to go about that. I had already been prepping the schematic for publication together with the explanation. I don't think my craft is *that* special to warant a patent though but it's a nice thought
I'm just excited the schematic works so well. I put it back into the simulator and it still retains its performance inspite of the changes. (Out with mosfets, in with BJTs). It does < 0.0005% THD 200K. I can't get it any better or faster.In the end though it's the output stage that will slow down the whole thing but with a buffered MOSFET drive, the OPS can be made rather fast too. Too bad I can't hook it up with an output stage and put it to the test
Sort of a bummer, I'd love discussing and explaining the schematic for I think there are a few clever things in there that make it all work Now who'd be interested in a schematic? I'm not interested in royalties, just fame and fortune. Oh why not the royalties
I'm a little surprised at all the positive comments, I didn't think my results were that nice. I don't have much to benchmark against except for my previous MF80 symmetrical amp project.
Now who'd be interested in a schematic? I'm not interested in royalties, just fame and fortune. Oh why not the royalties I'm a little surprised at all the positive comments, I didn't think my results were that nice. I don't have much to benchmark against except for my previous MF80 symmetrical amp project.
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I'm sure that would work - it's a standard push-pull VAS output. Myself I intend to use the Exicon laterals though I will not drive them directly from the VAS. When I was testing I had the high impedance feedback connected to the VAS output directly. When I inserted a buffer, performance instantly got much better.
The reason why I'd buffer MOSFETs is because at HF, their gate capacitance becomes a notable lower resistance and thus a load on the VAS if not buffered.
I can get away with 15 ohm gate stoppers on the output devices when I locally compensate the fets with a 47pF to stop them from oscillating. It makes for a very fast output
The reason why I'd buffer MOSFETs is because at HF, their gate capacitance becomes a notable lower resistance and thus a load on the VAS if not buffered.
I can get away with 15 ohm gate stoppers on the output devices when I locally compensate the fets with a 47pF to stop them from oscillating. It makes for a very fast output
Yep 15 ohm for the P channel and 18 ohm for the N channel.
In the sim I've changed the cascodes a little; I now turned them into a Hawksford cascode and THD performance noticably increased. Now to put it in practice again and see if I get to keep at least the current performance. I'm definitely going to keep the Hawksford cascode configuration
15 ohm for the P channel and 18 ohm for the N channel.In the sim I've changed the cascodes a little; I now turned them into a Hawksford cascode and THD performance noticably increased. Now to put it in practice again and see if I get to keep at least the current performance. I'm definitely going to keep the Hawksford cascode configuration
At first glance, wouldn't the gate resistor values be further apart, if you are trying to equalize the diff gate capacitance of the mosfets, or am I getting confused here? I mean more like 1:1.5 instead of 1:1.2 ?Yep
My instinct is to just calculate back from the published gate capacitance which would give me a ratio of 1:1.5 (I do not have the datasheet in front of me). At least for the Exicons and the Alfets.
However, why I asked: I have been told that the gate capacitance is published in the "Typical" column in part because it varies a lot from one production run to the next. Can't verify this, but the person who told me has reason to know this and to have measured it, something I can't do. Plus, given the nature of a typical circuit board, even one with short traces, the suggestion as made to me was to use something in the 1:1.3~1.35 range.
Sadly, this is all just based on hearsay on my part, which is why the values you posted jumped out at me, since the ratio is also different. So, do you base this on past experience, measurement, educated guess? Seems odd to me that you, and another engineer in a field unrelated to audio, would come up with the same thing, unless there is a reason
I also note that the complementary Alfet was on production hold for a while b/c the dies for one of the two components did not meet spec, while production of the N- and P-channel in separate packages, continued.
Hi PMI,
I didn't reach the values by using the exact datasheet capacitance values and calculate ratios. I merely approximated knowing the P part is the slower part. I actually measured the amp output to pick values that resulted the best symmetry which could be measured by how quick artifically induced oscillation faded away. No special procedures, just error and trial on a real output stage. The design uses 2 Exicon N parts and 2 P parts for a relaxed 80 watts into 4 ohms
I'm still going ahead with posting the schematic - it's not "secretly special". Instead it's cool to see that indeed topology is the main factor in a circuit's performance, followed by choice of components. The circuit has been consistently performing in the sim and in real as well now. It'll be fun sharing it and perhaps people will have ideas for improvement.
Eventually I want to scale it up to an output power of 100W into 4Ohm as a prototype.
I wonder if mr. Cordell would have anything to say about my little circuit and perhaps tell a bit about squarewave testing
I didn't reach the values by using the exact datasheet capacitance values and calculate ratios. I merely approximated knowing the P part is the slower part. I actually measured the amp output to pick values that resulted the best symmetry which could be measured by how quick artifically induced oscillation faded away. No special procedures, just error and trial on a real output stage. The design uses 2 Exicon N parts and 2 P parts for a relaxed 80 watts into 4 ohms
I'm still going ahead with posting the schematic - it's not "secretly special". Instead it's cool to see that indeed topology is the main factor in a circuit's performance, followed by choice of components. The circuit has been consistently performing in the sim and in real as well now. It'll be fun sharing it and perhaps people will have ideas for improvement.
Eventually I want to scale it up to an output power of 100W into 4Ohm as a prototype.
I wonder if mr. Cordell would have anything to say about my little circuit and perhaps tell a bit about squarewave testing
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Interesting that you arrived at something similar empirically. That gives me a bit more confidence that I was given the right information.
For comparison, here is a link to some test results I posted a while ago in Shaan's PeeCeeBee thread:
Square Wave Test Results
I was told once that relying on square waves leads to pushing the envelope too far in favor of a wide bandwidth v. a noise free circuit, but everyone is still doing it......a bit about squarewave testing
For comparison, here is a link to some test results I posted a while ago in Shaan's PeeCeeBee thread:
Square Wave Test Results
I was told once that relying on square waves leads to pushing the envelope too far in favor of a wide bandwidth v. a noise free circuit, but everyone is still doing it...
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Yes, there's something addictive about them especially if you can get them up to 100KHz in simulation and even better if it can then be repeated in a real circuit.
Wonder how many are watching this thread suffering the suspense.
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