2stageEF high performance class AB power amp / 200W8R / 400W4R

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If you have a 8ohms capable amplifier, it should easily cope with driving a 4r0 dummy load for at least a few seconds, not a mere few milliseconds.
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Dear Andrew,

thx for tips - this is exactly what I want to do. In simulation the amp has been tested down to 1.5R (current limiter range). Now it's time to do this in real life but need first to upgrade my dummy load.
The milliseconds where meant for the capacitor until it may explode. :)
BR, Toni
 
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It looks like the boards are installed on the side so that all one polarity output transistors, say PNP, are at the bottom and all the others at the top. But convection currents mean the bottom transistors will be cooler.
Probably not a real problem, just wondered if you had checked this.

Best wishes
David

Dear David,

it will be no problem as long as the heatsinks are good dimensioned and the pcb's are mounted in the vertical middle. Also the newer PCB's are smaller so NPN/PNP bjt's are 1cm nearer as current prototype layout. I have had tests running with both possible horizontal modes so during one test the PNP's where cooler and during other test NPN's where cooler. No measureable bias differences.
Note: the bias bjt is mounted between the NPN/PNP stages or in other words exactly in the vertical middle of the heatsink.
A heatsink with > 8-9 mm plate thickness is needed as a minimum requirement. The final amplifier will use a huge heatsink with 400x210x84mm size where the plate has a thickness of 16mm.
On this huge heatsink 2 of this amplifiers will be mounted to finally get a 4 channel amplifier.

BR, Toni

 
The group of two rows of output devices will run hotter if they are located in the middle of the heatsink. Even worse the upper pair will be hotter than the lower pair.
The heatsink manufacturer's publish data to show how to get the best from a heatsink amd how to locate groups of devices so that each device in a group run at roughly the same temperature.
When done as the manufacturer suggests you will find that the devices will run cooler because you are using the heatsink more effectively.

The simplest for a two row grouping is to move the whole group slightly down towards the bottom edge.
Similarly for a single row group these should be loacted below centre line, roughly 40% up from the bottom (=10% below centre) for best use of the heatsink.

The problem as I see it is that available information is not looked at. Poor project research is at the root of so many builder's mistakes.
 
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The group of two rows of output devices will run hotter if they are located in the middle of the heatsink. Even worse the upper pair will be hotter than the lower pair.
The heatsink manufacturer's publish data to show how to get the best from a heatsink amd how to locate groups of devices so that each device in a group run at roughly the same temperature.
When done as the manufacturer suggests you will find that the devices will run cooler because you are using the heatsink more effectively.

The simplest for a two row grouping is to move the whole group slightly down towards the bottom edge.
Similarly for a single row group these should be loacted below centre line, roughly 40% up from the bottom (=10% below centre) for best use of the heatsink.

The problem as I see it is that available information is not looked at. Poor project research is at the root of so many builder's mistakes.
 
Dear keantoken,

soon I will get my "Distortion Magnifier" Kit (developed by Bob Cordell; search for "pilgham audio") so I am able to get more out of my VP-7723D audio analyzer.
Are Fairchild BC327-40/337-40 types for testing OK?

BR, Toni

According to the datasheets the Fairchild and OnSemi BC3x7 are a bit different. I am using the OnSemi parts. Since they show different Vcesat behavior, I worry, but I suspect the Fairchild parts won't be any worse than the BC5x0, of which theirs are the best IIRC.

The OnSemi datasheet shows a 45k Zcb for the OS BC327 at 10mA in the quasi-sat region of 250mV-700mV.

I wonder if there is a way to derive quasi-sat behavior roughly from datasheets. For instance, in a Vcesat graph where Hfe=10, we know that the B-C junction is biased forward about 11 times less than the B-E junction. So my theory is that the B-C junction at this quiescent should have 11 times the diodic impedance of the B-E junction. Thus for every 27mV above Vcesat, Zcb should halve. This must apply for the relatively flat Vcesat region, as it is within 6db for 2 decades or more, which indicates both diodes are in forward conduction in this region and so their diodic impedances track at the base.

Unfortunately this doesn't say anything about the Vbe modulation effects I see in my Kmultipliers. If this were everything, my Kmultipliers would get -87db PSRR.
 
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1837/4793_a used in VAS/CCS for this sim There is a small amount of 'blocking' as it comes out of +ve overload but if this was 20kHz, it would be considered 'mild'.

Toni, please confirm this is what the 20kHz overload looks like.

If you have a 1930/5171 version still around, please take some pics of 20kHz overload if you ever fire it up again.
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Dear kgrlee,

attached overload screenshots from 1kHz and 20kHz using real life 1837/4793 bjt's.

Real life 1930/5171 will follow soon.

BR, Toni
 

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I'm trying to figure out how your experiments with current mirror degeneration went. Could you describe the starting values of degeneration when you used the 2N5401, and the measured THD and noise, and then the changes you made and their effects? Did you increase or decrease degeneration to improve distortion?

I made this post in Cordell's thread:

http://www.diyaudio.com/forums/soli...ells-power-amplifier-book-67.html#post3512450

The short story is that using better transistors really may not improve performance, up to a point, after which it is necessary to use a Wilson mirror. After adding the Wilson mirror, degeneration is no longer necessary for lowering distortion, so you can go with 50mV or probably less. My question is, does the degeneration have a significant effect on the measured noise in your design?

The more I think about it, the more I think the BC3x7 must be the ideal CM transistors.
 
Overload Recovery etc

Real life VAS 1930/5171 overload looks nearly the same as 1837/4793 overload. It makes not really a viewable difference using
1837/4793 bjt's either in VAS and/or output stage regarding overload behaviour.
Thanks for these plots Toni.

This level of blocking is sorta what I expect to see from an amp like yours.

It means neither AndyC's or Harry Dymond's models accurately sim overload recovery in your amp. AndyC's 1837/4793 show too much blocking and Harry's 1930/5171 show none.

For me, simulating macro behaviour like overload is more important than whether THD is 1ppm or 2ppm. :eek:

Damn! :mad:

Mr. Dymond, any chance of you tweaking your models to show some blocking with Toni's circuit?
 
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I'm trying to figure out how your experiments with current mirror degeneration went. Could you describe the starting values of degeneration when you used the 2N5401, and the measured THD and noise, and then the changes you made and their effects? Did you increase or decrease degeneration to improve distortion?
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My question is, does the degeneration have a significant effect on the measured noise in your design?
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Here my lab results from post #88
Next step try to improve current mirror: replaced 2N5401 with new matched BC560C. Distortions increased to 0.0040% but a little bit lower HF noise. Degenerate R7 and R10 by 220R shows now THD 0.0036% and lower HF noise. Keeping it.
Starting point of THD20K+N@200W@8R before CM modification was 0.0039%. Replacing 2N5401 by BC560C showed an increase of 1ppm but this is not significant and maybe not reproduceable. At this low distortion levels the measurement is more influenced by a good or bad mains power situation (more spikes on mains network due to motor control of a washing machine somewhere in this or the next house ...).
Today after many hours of real life measurement I am not 100% sure if the stronger CM degeneration really bettered the THD+N by 3ppm or distortions introduced by mains power are gone during resoldering CM degeneration resistors. OTOH: simulations shows 10nV/rthz bettered noise performance!
Need to redo measurements with Bob's DM to verify this.

BR, Toni