Alternative buffer topologies

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If we cheat and use a bipolar cascode, matters improve: the offset is apparently down (but in sim only, in reality the N-P matching issue would remain), and the THD is down too, but it doesn't reach the level of the "optimum" version, where FETs are "helped" by bipolars.

In summary, the optimum number of FETs for this buffer is approximately 0 :D
 

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And finally, a jFET input MOS output version.

Not very good, predictably, but here the FETs used are not true complements, they are rather approximate.
In a conventional topology, this would have a catastrophic impact on the DC offset and the even order harmonics, but here the effect is minimal, showing the superiority of this scheme.
 

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Hi Guys

The circuits in the Japanese link are all optimised for voltage gain as complete amplifiers. Operating them as unity-gain buffers requires some redesign. However, you are still left with all the problems of sourcing and matching complimentary jfets.

Elvee's circuit is best built with a BJT front end, as his numbers clearly show. Like nearly all other complimentary symmetry circuits, some degree of matching of the upper and lower devices will ensure a good THD profile and reasonable real-world DC offset without servos. Emitter degeneration - something Elvee dislikes - makes the circuit more tolerant of device parameter spreads at the expense of some RF performance - distinctly not all RF performance.

A DC path to ground at the input and output of this circuit assists in controlling DC offset. The absence of such parts is a common historical error in opamp app notes and most direct-coupled circuits.

Have fun
Kevin O'Connor
 
Emitter degeneration - something Elvee dislikes - makes the circuit more tolerant of device parameter spreads at the expense of some RF performance - distinctly not all RF performance.
Degeneration does what it says on the tin: it results in degenerated circuits, ie nice and pure exponentials become ugly transcendental equations, making later compensations impossible.
They are sometimes a necessary evil, but they should be used as sparingly as practical.
It is not so much the RF performance that is impacted, frequently the opposite, but rather the accuracy and linearity.

If RF stability is a problem, ferrite beads are a better fix.

Here is the "double-barreled" version of the buffer.

Surprisingly (and disappointingly), it does not result in better performances, the opposite in fact.
In addition, it also requires intersex matching and thus seems (for the moment) to offer no advantage, except a very marginally reduced BOM
 

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Hi Guys

Emitter degeneration - a form of local feedback - increases nonlinearity. You are a very funny guy!
You are right, in simple cases of isolated stages, that is what it apparently does.
But to attain 1ppm linearity with such a method, the degeneration has to be much larger than the junction's dynamic resistance.
For a 1mA excursion of emitter current, this would require an emitter resistor in excess of 26 Meg, not really practical.

Early transistor circuits used that kind of method to achieve an acceptable linearity, but it required a high supply voltage, and there is a limit to what can be achieved.
For example, I have an old W&G PS-6 frequency synthetizer of the sixties having a general supply voltage of ~75VDC

In translinear and related circuits, with loops of junctions, the exponential I-V relationship is essential in attaining high levels of linearity.
 
Here is an alternative compensation scheme, adding some feedforward components to the mix.

The buffer now tolerates in excess of 330nF direct output capacitance.
The cost is a somewhat increased THD level, from 40ppb to 90ppb, but it is still tolerable.

Also shown is the effect of a realistic source impedance (500 ohm) on the performance.
 

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I'm a bit nervous about what I perceive to be a requirement of exponential junctions matching up to eliminate distortions - IF indeed I am perceiving this correctly ?
In this case, the matching requirement is relaxed, it is only static: deviations from static conditions cause uncompensated non-linearities.
By going to the next level (full dynamic matching), some orders of magnitude improvement in performance would be made possible.
Next installment perhaps?
 
PS: in practice in this case it will be even more tolerant: any spread will be diluted over 8 junction voltages, and will primarily result in an offset voltage (moderate) and ultimately in even order distortion.

The topology itself with its very high loop gain is quite touchy, but that's another story.
It is manageable though, with normal precautions
 
It is possible to combine this buffer with class AC.

This allows pure class A operation up to 4~5W, and a seamless and distortionless transition towards higher levels, contrary to class AB where the increased width of class A operation costs a higher distortion in the transition zone (compared to optimally biased class AB).

The end result is an even better linearity, in the 10ppb range.
This is for the output stage alone. If it is included in GNFB loop (which is perfectly possible thanks to the low phase shift and wide bandwidth) with a matching VAS, a further 20 to 40dB is achievable, bringing the overall THD to vanishingly low levels.
 

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Quite spectacular numbers , Elvee...

What is the difference if real current sources are used.?..
I haven't tested yet with this particular variant.

But degradation is a certainty, at least if they are used regularly, ie trying to make them as perfect as possible to mimic spice sources.

There are other options though: instead of seeing them as liabilities, they can be made to contribute actively to the overall linearity.
Unigabuf is an example of such a scheme.

I have already explored some of these, in sim and even in reality, and they look promising. In sim at least: the reality is for the moment inaccessible with my old ST1700, even augmented with subtraction techniques, additional filters plus FT with a sound card. I can just test the functionality of the circuits, not their actual perfomance.
That has been another of my axes of research for some years now: coherent measurement of THD buried in a large negative S/N ratio, because virtual constructions do have some appeal, but in the end we have to find ways of making sure they are not simply pipe dreams.
That may in fact be the most difficult part of the job, and at this kind of level, I am not even sure the Ohm's law really holds true: it is based on a statistical assumption of an excessively large number of slow charge carriers in a conductor, but under the ppb level, some early effects of saturation could begin to show in ordinary resistors and even conductors.

Anyway, simulation is the first step: something not working in sim is very unlikely to work in reality. The opposite is much more common.
 
.... pure class A operation up to 4~5W, and a seamless and distortionless transition towards higher levels, contrary to class AB where the increased width of class A operation costs a higher distortion in the transition zone (compared to optimally biased class AB).....

I don't agree, at least not 100%. Consider multiple parallel pairs of complementary output devices where each pair is optimally biassed Class AB (or B as some like to say). You can design this so that the sum of idle current through all the pairs is as high as you need to allow operation in Class A to whatever power level you want, limited only by cost and practical considerations. The transition to Class B will still be optimal, limited only by device matching.

On a practical level I very much like this approach as I believe reasonable device matching is possible for reasonable cost. It allows the heat to be dissipated by more devices, spread over a larger area of heatsink. It reduces the variation in current through each output device for the same power and load impedance compared with a single output pair. This reduces the distortion.

A downside is increased drive requirements. Roender used a CFP driver in his implementation of this approach (IIRC he had about 2W in Class A before transition to Class B).
 
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I don't agree, at least not 100%. Consider multiple parallel pairs of complementary output devices where each pair is optimally biassed Class AB (or B as some like to say). You can design this so that the sum of idle current through all the pairs is as high as you need to allow operation in Class A to whatever power level you want, limited only by cost and practical considerations. The transition to Class B will still be optimal, limited only by device matching.
Brute force is always an option, but class AC has more subtle advantages: the bias voltage is an order of magnitude larger, the emitter resistors are also larger and this means the sensitivity to initial inaccuracies or thermal tracking problems is correspondingly smaller: with class AC, you are sure to get your performances without having to parallel too many components and without finicky thermal adjustment and compensation issues.
I agree that a fully automatic bias really is the way to go, but short of that, class AC is already a step in the right direction.
 
What is the difference if real current sources are used.?..
Here it is, somewhat rationalized, and with real current sources.
The sources are crude and minimalist, but active.

This allows a further improvement in linearity, and also gives an opportunity to compensate for the poor complementary of the output pairs.
The class AC version could also benefit from such an improvement.
 

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