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Old 5th November 2012, 03:40 PM   #21
lineup is offline lineup  Sweden
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Here is the buffer working att +/- 42 Volt.
Distortion at 1 Watt RMS is THD 0.00007%.
At more power out THD is typically 0.00018%.

The drop out voltage mostly from the MOSFETs is between 6 and 7 Volt from the supply rails.

This is a very good Power Buffer!
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Old 5th November 2012, 03:43 PM   #22
Zoran is offline Zoran  Serbia
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Yes
(but it is still PP complementary...)
he he
cheers
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Old 5th November 2012, 04:01 PM   #23
MiiB is offline MiiB  Denmark
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in one of "thinkhlin" circuits there was som kind of crosscoupling.. Think that with some work could form some kind of error correction... have you explored that..??
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Old 5th November 2012, 04:03 PM   #24
Elvee is offline Elvee  Belgium
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Quote:
Originally Posted by lineup View Post
I will post some working circuits. Just want to make them better first. But why dont you try my idea in SPICE. There is room for improvement when there are more than one head in use.
If you want to add a deterministic bias control, you can pick some ideas from here:
Is the CFB topology superior, and why?
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Old 5th November 2012, 04:14 PM   #25
wahab is offline wahab  Algeria
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Quote:
Originally Posted by lineup View Post
Here is the buffer working att +/- 42 Volt.
Distortion at 1 Watt RMS is THD 0.00007%.
At more power out THD is typically 0.00018%.
Thoses numbers are dependent of the generator output Z
wich in your schematics is modelled as being 0R unless
i did miss something.

Since the source can not have nulled output Z the THD
ratios at high frequencies will be much higher.
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Old 5th November 2012, 09:59 PM   #26
AKSA is offline AKSA  Australia
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Lineout,

Can you please how you determine the current through the bias generator compared to the two input transistors? You have 20mA through the input npn/pnp, and another 20mA through the bias gen, but how do you define this current?

Cheers,

Hugh
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Last edited by AKSA; 5th November 2012 at 10:02 PM.
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Old 6th November 2012, 06:43 AM   #27
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interesting idea .... i would like to see a bjt version also ....

Kind regards
sakis
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Old 6th November 2012, 08:24 AM   #28
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Quote:
Originally Posted by lineup View Post
I repost my circuit.
The previous was not fully stable.
This one is.
With 0.00004% THD
great! I just need a high-performance output stage!
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Old 6th November 2012, 09:11 AM   #29
Shinja is offline Shinja  Japan
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there is similar idea in japan with complementary JFET instead of 4 BJTs.
Voltage-mirror 2SJ113/2SK399 SEPP stereo power amplifier
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Old 6th November 2012, 10:32 AM   #30
Jay is offline Jay  Indonesia
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I had also a great interest with similar output stage based on PMA (Pavel Macura) amplifier, because of the lower THD. I gave up because the DC offset required an output cap.
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