I was thinking along the lines of a DIY project for this. But this would be an enormous undertaking for one person. What about a collective effort kind of like how Linux is handled.
One coordinator and many techs undertaking smaller parts of it. Each contributing there expertise.
David.
Figure 11.17 MOSFET Amplifier Simulation
Hi roland,
As you requested, attached below is the simulation folder for the MOSFET power amplifier shown in Figure 11.17 of my book. The amplifier includes two output pairs each biased at 200 mA, and employs TMC input compensation. It simulates at THD-20 = 0.0014% at its max power output of 44V peak into 8 ohms. THD-20 decreases monotonically as output power is decreased. EKV models are used for the output MOSFETs.
Cheers,
Bob
Hi roland,
As you requested, attached below is the simulation folder for the MOSFET power amplifier shown in Figure 11.17 of my book. The amplifier includes two output pairs each biased at 200 mA, and employs TMC input compensation. It simulates at THD-20 = 0.0014% at its max power output of 44V peak into 8 ohms. THD-20 decreases monotonically as output power is decreased. EKV models are used for the output MOSFETs.
Cheers,
Bob
Hello Bob,
Out of curiosity how close to the simulated results are the actual real measurments of this amplifier, I am assuming you have built this amp.
Regards
Arthur
)Hello Bob,
The world is small as I wanted to ask today the same question as Roland. You gave me some answer right now by providing the simulation files. I will investigate more with them following days.
Thank you for this.
Moreover, I would like to ask you something I can't find in your book up to now.
Fig9.7 gives the basics of the compensation used for your design. MIC (Miller Input Compensation) is used and several R-C networks added on the high impedance points. Your Mosfet Amplifier Fig11.17 also has TMC (Transitionnal Miller Compensation). Your Mosefet Amplifier Fig25.15 also has MIC.
My question is : What is your methodologie to make all that work stable with good phase and gain margin? There are 7-8 components to tune, we are far from the simple Miller compensation used in more common amplifiers.
Do you probe the various loops (which one?) and adjust phase and gain margin for each one? How do you balance the value for each R-C couple? Do you step all components up to a good result? How do you define the work is finished?
I would be interested if you could share the way you work before providing the final results.
If other talented designers could also share the way they would adjust such a design, I would appreciate it very much!
Thank you all for your comments!
Regards
Laurent
The world is small as I wanted to ask today the same question as Roland. You gave me some answer right now by providing the simulation files. I will investigate more with them following days.
Thank you for this.
Moreover, I would like to ask you something I can't find in your book up to now.
Fig9.7 gives the basics of the compensation used for your design. MIC (Miller Input Compensation) is used and several R-C networks added on the high impedance points. Your Mosfet Amplifier Fig11.17 also has TMC (Transitionnal Miller Compensation). Your Mosefet Amplifier Fig25.15 also has MIC.
My question is : What is your methodologie to make all that work stable with good phase and gain margin? There are 7-8 components to tune, we are far from the simple Miller compensation used in more common amplifiers.
Do you probe the various loops (which one?) and adjust phase and gain margin for each one? How do you balance the value for each R-C couple? Do you step all components up to a good result? How do you define the work is finished?
I would be interested if you could share the way you work before providing the final results.
If other talented designers could also share the way they would adjust such a design, I would appreciate it very much!
Thank you all for your comments!
Regards
Laurent
Hi Arthur,
Actually I did not build this amplifier. As you know, SPICE simulations, especially of power amplifiers, can be optimistic or even under some conditions in certain regards pessimistic.
An example of SPICE being optimistic would be if the transistor models are more ideal than in reality. An example would be real-world Early effect being more significant and nonlinear than as modeled. Another example of SPICE being optimistic would be the absence of real world impairments, such as the use of ideal power supplies in the simulation, perfect grounding in the simulation, and absence of nonlinear magnetic field coupling from the class AB output stage in the simulation.
An example of one aspect of SPICE possibly being pessimistic as compared to the real world might be the SPICE FFT showing higher-order THD components in a MOSFET amplifier, possibly due to shortcomings in the square-law or EKV model, or shortcomings in the simulation or FFT of the results.
Cheers,
Bob
I still get baseline hair but Blackman window puts it a little lower, more points in the sim is good - the maximum timestep in the .tran sould give several times as many sim points as the fft points so the interpolation filter input exceeds Nyquist, then the smoothing filter length can be increased
Simulation of THD and reality
Hello Bob
Thankyou very much for your response. In my experience I think that its not trivial to get THD-20 =0.001% at 44V peak into 8R (200K BW) and going to 0.0001%(1ppm) is very hard in real hardware. Curiously the simulator is OK at predicting say the Blamless circuit performance but begins to get very optimistic at the 0.0001% levels I think that to get real circuit performance at these levels your simulated THD needs to be much lower.
Regards
Arthur
Hello Bob
Thankyou very much for your response. In my experience I think that its not trivial to get THD-20 =0.001% at 44V peak into 8R (200K BW) and going to 0.0001%(1ppm) is very hard in real hardware. Curiously the simulator is OK at predicting say the Blamless circuit performance but begins to get very optimistic at the 0.0001% levels I think that to get real circuit performance at these levels your simulated THD needs to be much lower.
Regards
Arthur
you think THD below 0.001% in whole audio range is not possible? look at this:
CustomWorks Zesilova? – HYPA A400
CustomWorks Zesilova? – HYPA A400
frankly, i don t believe that 1000 ppm is , honestly, audible,
so the whole debate of ppm range distorsion is more or less
a useless one , and there s other important areas,as stability,
wich are generaly neglected as an inherent trade off to
achieve low levels of distorsion....
amp distortions
0.1% of crossover distortion is very likely to be audible.
I think you are wrong.
0.1% of crossover distortion is very likely to be audible.
Hi Laurent,
I first started using Miller Input Compensation in my MOSFET power amplifier with error correction published in the JAES in 1983. In that design I had the Miller compensation capacitor go from the VAS hi-Z node back to the input diff pair (i think there was also a small resistor in series to provide a zero in the compensated response). The value of that "Miller" capacitor is set to establish the desired gain crossover frequency of the amplifier. Its reactance should equal the resistance of the feedback resistor at the gain crossover frequency. That part is pretty straightforward. The rest of the compensation is there to stabilize the semi-local feedback loop formed by the Miller feedback. This loop does not involve slow power transistors and is not strongly affected by amplifier output loading, so its gain crossover frequency can be larger, on the order of 10 MHz. In that 1983 amplifier design, I placed a series R-C network across the outputs of the input differential pair to stabilze the compensation loop.
The resistance and capacitance of that added network were tweaked to provide good stability margin as seen by squarewave probing at various points in the circuit (I was not using SPICE simulation for power amplifier design back then). There was not a lot of explicit design calculation in setting those values, but they were chosen to yield a gain crossover frequency for the compensation loop in the neighborhood of 10 MHz as a starting point. A starting point for the resistor was to create a zero at about an octave above that loop's gain crossover frequency.
In later designs using that same IPS/VAS/MIC topology, I discovered that in some cases it was desirable to add a series R-C network shunting the VAS output node to ground. In designs with low capacitance at that node, the majority of signal current could flow through the Miller compensation capacitor back to the input stage input node. The inclusion of the added R-C network diverts a good fraction of that current from flowing that way, better defining the loop gain of the Miller compensation loop. The capacitance of that added network is chosen small enough so that it does not seriously impair the slew rate capability of the VAS. That network also helps significantly in situations where the Miller feedback is taken from the emitter of the pre-driver rather than directly from the VAS hi-Z load. Its presence serves to better define the VAS voltage gain at high frequencies and provides an opportunity to add a zero.
The values of these components were all tweaked by trial and error while looking at circuit stability with simulations. I wish I could say that I came up with an algorithm or converging design procedure to arrive at the values, but I didn't.
Stability of the compensation loop was evaluated by looking at numerous nodes with frequency response and square-wave excitation. The most significant tool was looking at the frequency response of the feedback signal on the input of the input differential pair when the global feedback was made about 100 times smaller. Ideally, this node should have unity gain from the amplifier input (it is a voltage follower). There should be no peaking evident at this node. One will see rolloff beginning in the neighborhood of 10 MHz, which is the closed loop frequency response of the compensation loop.
Cheers,
Bob
I agree with you that getting THD-20 (NOT just THD-1) down below 0.001% is difficult in a real-world circuit. However, getting simulated THD-20 further down will not necessarily be sufficient to get there, since the distortion floor might be set by implementation imperfections that have nothing to do with the simulation.
Cheers,
Bob
You are wrong, since you cancel the fact that i was
responding to a post that stipulated THD...
You bring things out of context to make discutable points,
but still a wrong one, since 0.1% of distorsion, be it crossover one,
is hardly audible...
Hi wahab,
Although correlation between THD and sound quality is sometimes much less than we'd like, I would not throw the baby out with the bathwater. 1000ppm is a lot of distortion for a solid-state amplifier, and it is likely that such an amplifier will not sound great. However, it is true that softer forms of distortion at such levels, such as in a vacuum tube amplifier or from a soft clipping circuit, will often not sound objectionalble.
A solid state amplifier that has 1000ppm distortion from the usual solid state distortion sources is probably not well designed and will probably sound bad. Some forms of distortion, such as crossover distortion, which shows up as THD, can be quite objectionalble even at lower levels.
Cheers,
Bob