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Old 7th March 2010, 02:55 PM   #101
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What is the THD of your design?
can you make a screenshot of the schematic?

On the emitter follower driver stage:
I don't want to run my VAS at 25mA.
But to be honest, i guess i will have to check on that matter again more thouroughly. (wich will take some time...)

PS:
Maybe we should open another thread on emitterfollowers for mosfet outputs, or something like that. Maybe there is already a thread on this, we could join. I feel it might be getting a bit off topic.

Last edited by krachkiste; 7th March 2010 at 03:03 PM.
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Old 7th March 2010, 03:09 PM   #102
wahab is offline wahab  Algeria
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Quote:
Originally Posted by steph_tsf View Post



According to this simulation, the last thing to do would be to add an emitter follower stage between the VAS and the MOSFETs. Can you explain again why you want to add an emitter follower stage ?
Without it, distorsion will skyrocket..
A vas output impedance is too high to safely drive a vertical mosfet gate.
Only the hitachi 2SJ162/2SK1058 can be drived directly by a vas, and yet,
adding an EF buffer greatly increase their THD figures...
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Old 7th March 2010, 03:27 PM   #103
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Quote:
Originally Posted by apexaudio View Post
20Hz-30kHz, THD 0,5% at 240W on 8ohm load.
It was well enough to me.

Last edited by apexaudio; 7th March 2010 at 03:30 PM.
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Old 7th March 2010, 07:40 PM   #104
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I have done the simulation of the Apex HV23 amp under Tina 7 Texas Instruments.

However, I designed the bias stage using a Vbe multiplier scheme. It shouln't degrade audio performance.

See attached files.
There is one file with DC-servo.
There is one file without DC-servo. I think that DC-servo is mandatory.

The two files are reayy for simulation under Tina 7 Texas Instruments.
Audio results look suprisingly good, from the simulations results.
Attached Files
File Type: zip Apex HV23 simulations.zip (10.0 KB, 573 views)
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Old 7th March 2010, 08:25 PM   #105
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Quote:
Originally Posted by steph_tsf View Post
I have done the simulation of the Apex HV23 amp under Tina 7 Texas Instruments.

However, I designed the bias stage using a Vbe multiplier scheme. It shouln't degrade audio performance.

See attached files.
There is one file with DC-servo.
There is one file without DC-servo. I think that DC-servo is mandatory.

The two files are reayy for simulation under Tina 7 Texas Instruments.
Audio results look suprisingly good, from the simulations results.
I see simulation, thank for your time Steph, and I was expected simillar results. Output devices are IRF520/IRF9520 is that just notification?
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Old 7th March 2010, 10:31 PM   #106
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Quote:
Originally Posted by apexaudio View Post
I see simulation, thank for your time Steph, and I was expected simillar results. Output devices are IRF520/IRF9520 is that just notification?
I've used vertical MOSFETs IRF520/IRF9520 because those devices were available in Tina 7 Texas Instruments Spice simulator.

In Tina 7 Texas Instruments, the available IRF520/9520 devices are simulated using a Spice Level-3 model. Not a subcircuit. I don't think the non-linearities at low current drain are simulated. I don't think the C_gd dependencies are simulated.

In Tina 7 Texas Instruments, I found no 2SK/2SK lateral MOSFET models.

How to precisely Spice-simulate vertical MOSFETs and lateral MOSFETs, especially what's happening at low drain current (transconductance modulation), especially what's happening in Class-B regime, when the device enters cut-off and also when the device enters conduction ?

If improved vertical MOSFETs models and lateral MOSFETs model do exist, how to use them under Tina 7 Texas Instruments ? Will it be needed to upgrade to Tina 7 full version - not free anymore ?

Last edited by steph_tsf; 7th March 2010 at 10:34 PM.
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Old 7th March 2010, 11:47 PM   #107
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You can add a hint of subthreshold behaviour by putting a diode in series to source.
Maybe the diode model parameters can be tweaked, for a more accurate emulation of the effect.

any thoughts on this?

PS:
Are there really no parameters in the models, intended for modelling of the subthreshold region?

Last edited by krachkiste; 7th March 2010 at 11:55 PM.
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Old 8th March 2010, 11:07 PM   #108
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Here's the Apex circuit in LTSpice (sans protection and clip).
I've tried to stay true to the original schematic. Didn't
attempt to upgrade or second guess the design, all part
designators kept same for easy cross-reference. I did
cheat models, and thats maybe now causing a problem...

I don't know if its my substitution of LTSpice default library
transistors to blame??? But there seems to be a small glitch
in the zero crossing. Like output MOSFETs are underbiased?

I'm not sayin the real Apex circuit misbehaves in that way.
I may just need to plug in more correct/accurate models.
I don't yet have all those 2SA transistor models handy.

Anyways, 1KHz large sinewave performance seemed OK.
Didn't see the point to test more challenging signals while
the output bias in my simulation was obviously not right.

I've tweaked bias pot to either extreme. So thats not it...
For now, its set back to center (250+250).
Attached Files
File Type: zip apex.zip (2.5 KB, 562 views)

Last edited by kenpeter; 8th March 2010 at 11:17 PM.
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Old 8th March 2010, 11:33 PM   #109
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What is the bias current in your simulation?
Very easy to check, to see if really "underbiased".
Maybe the V_th of your models is too high for the original trim pot value.

PS:
with P1B set to 250, the FETs are biased off. (some pA)
I set P1B to 2500 (add a zero), I got something like 0.3A per device. The transient looked fine then.

Last edited by krachkiste; 8th March 2010 at 11:39 PM.
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Old 9th March 2010, 12:08 AM   #110
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OK, now running 300mA output bias as Krachkiste suggested...
1KHz sine looks perfect, 22KHz a little ragged, 96KHz awful...

But add 100uF from emitter to emitter as has been previously
suggested, sines clean and crossing nice all the way to 96KHz.
At least in simulation its does, whatever that counts for...

I have not yet checked what effect that cap's pole might
have upon phase margin? The sim so far does not appear to
ring or oscillate with 100uF added cap, but thats not a real
thorough analysis...

Last edited by kenpeter; 9th March 2010 at 12:13 AM.
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