hi-loop gain amp

[mfc]

Hi,

The theme of this amp is hi loop gain so that distortion
can be so low that the main problem is choosing parts
and layout.

What motivated me was that maybe the ear really has a
wider dynamic range than we can believe. Therefore why
not push distortion as low as possible?

The 0db point is around 1.8Mhz and OL gain is around
118db. It looks like things should be stable (see attached
loop gain diagram) in theory. Don't know about practice
which is one of the main reasons for me posting this.

I'm no super expert just a hobbyist, and I asked Bob C.,
and Andy C. for early revue on this, which they both
graciously provided.

I'll post more stuff as I get it formatted and uploaded.
I may be a little slow due to my workload.

So far it has just been simulated in LTSpice. I know Spice
can only go so far.

Mike

[mfc]

Here is FFT at 20Khz and 45v peak out into 4 ohms.
Yes, 2nd and 3rd are lower than 4th..., but at these
levels, who cares?

[mfc]

Here is FFT at 200Hz and 45v peak out into 4ohm.

[mfc]

Here is a 20Khz square wave into 4ohm load.

[mfc]

and here is the LTSpice package that created the drawings.

Hope to hear comments. I hope this is a learning experience
for both of us. Have fun with it.

Mike

[darkfenriz]

Nice design with advanced techniques used!

I see you are using nested differential feedback instead of typical miller. This brings great THD reduction but tends to big stability issues on different loads.
Same goes to input stage which is casoded sziklai pairs.
A third potential source of instability is mosfets predrivers. Usual way to make them more stable is to add a gate resistor, but with NDFL you may need some fancier way to not lose too much speed.
My advice is to play a little bit with snubbers and ferrite beads and take care of layout.

I think you should definitely build a prototype, if real life results bring results even close to simulation results you may feel proud of yourself.
This may be a tough experience, but definitely worth it!

Regards,
Adam

P.S. What's the bias?

[mfc]

P.S. What's the bias? [/B]

Its set at a little over 200ma thru each output transistor.
So class A at low signal levels, class B at higher.

Thanks for the comments regarding NDFL. I was cautioned
by both Bob and Andy about this. Both mentioned using TMC.
In Sim, I didn't seem to run into any problems even with
capacitve loads up to 4uF // 1 ohm.

Attached is a ~45v 20Khz square into 4uF // 1ohm.

I saw more problems using a bipolar output driver like the
MJE15034. This was harder to control. Using the ECX10N16
in this position was easier. Maybe this is a modeling issue?

Mike

[ostripper]

Thanks for that LT package...I will dissect it.

[darkfenriz]

Keep in mind that mosfets in reality are only slightly faster than bipolars.
Your slew rate is so-so, expect stability issues as if you ued all bipolar amp, such a simulated waveform on capacitive load usually means wild oscillation in reality.
Don't get me wrong, some schematics are just easier to put into real-life working amplifier with no strange phenomena expected, yours is not.

[homemodder]

The Vas looks like a baxandall super pair. Would be interesting to build it, usually very unstable, loves to oscillate in Mhz range, your design would be the first here on this forum if it worked.