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Old 30th May 2008, 08:46 AM   #51
jcx is online now jcx  United States
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thanx, already recieved one
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Old 31st May 2008, 05:46 PM   #52
jcx is online now jcx  United States
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More (simulated) fun with AD797 compensation

I updated my simplified AD797 sim circuit with a few values from the AES paper – still a long ways from the full circuit and qualified process models that Scott must have

I am trying to illustrate 2 different compensation schemes:


i. the data sheet mixed decomp/”distortion cancellation” C divider

ii. 2-pole T network using the Cn local feedback/decompensation port


with 2 different measurements:

i. loop gain measured inside both feedback loops – which I believe shows that “distortion cancellation” is loop gain and which better measures the stability of the circuit – and illustrates that I have nearly the same loop gain for both example compensations, ie apples to apples comparison

ii. loop gain measured inside the resistive gain setting feedback loop but outside of the Cn local feedback – which in this case captures the loop gain available to reduce op amp input stage distortion as well as reduce output stage impedance and distortion


both plots include both compensations in duplicated circuit blocks, only one circuit shown for each
I used 30 dB for the gain to be as relevant as such a simplified sim can be to Mr Curl's investigations

Inner most loop gain: (green = T comp, red = Analog's comp circuit shown)

Click the image to open in full size.



Outer loop gain:(green = T comp circuit shown, red = Analog's)

Click the image to open in full size.

I believe the above sims illustrate T compensation could provide better distortion reduction over the audio frequency range compared to Analog's suggested compensation/distortion cancellation circuit

another advantage of the T compensation shown is the boosting the negative rail psrr, the improvement is very nearly the difference seen in the outer loop measurement of loop gain
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Old 1st June 2008, 02:06 AM   #53
KSTR is offline KSTR  Germany
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Jcx,

will this double pole comp, while having about the same 60deg phase margin at unity gain, be stable in a 30dB gain circuit? What does the step response look like for that gain, into say 100pF//2k?
I see only 20deg phase margin...

- Klaus
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Old 1st June 2008, 03:36 AM   #54
jcx is online now jcx  United States
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phase margin is most important near the 0 dB loop gain intercept where output stage loading can reduce gain by small amounts - generic control loop practice considers 12 dB gain margin adequate, and while 60 degree phase margin at the 0 dB intercept is pretty "industry standard" some high performance loops are designed with 30-45 degree margins - input/command low pass pre-filters recommended

for the ~20 degree phase margin near 100 KHz to have any stability consequence the loop gain must be reduced by ~30-40 dB, Gerald Graeme refers to this as "gain stabilization"

and the lower picture's T compensation plot showing the small phase margin @ 100 KHz is a plot of the outer loop gain only

I believe the stability with respect to output stage loading gain reduction is governed by the gain plotted in the picture above that: loop gain measured inside both feedback loops enclosing the output stage - for which there is little difference in the 2 compensation scheme's gain/phase

the lower plot of the T compensation does suggest slew rate limiting in the input stage could cause "describing function sense" gain reduction that could make the low phase margin noticeable

but the AD797's hot diff pair bias gives 1.8 mA / 50 pF = 36 V/uS slew rate limit - which shows the output stage will clip at the supply rails at 100 KHz before slew rate limiting even begins - much less reaches 30-40 dB of describing function gain reduction required to make the plotted low outer loop 100 KHz phase margin problematic

the proof of the concept will be in playing with a hardware implementation – I really doubt that at the discussed audio signal levels that there is any easily measurable way to distinguish them – the base AD797 performance is just so high to start with

a couple of quick sims suggests the T compensation is more robust to C loads up to 3 nF, 10 Ohms series R keeps both simmed compensations well behaved even with 10 nF C load
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Old 1st June 2008, 04:27 AM   #55
jcx is online now jcx  United States
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I see a possible confusion - the loop gain plotted above is the "excess loop gain" with the 30 dB feedback gain setting accounted for automatically

0 dB on these plots is the "gain intercept" where the op amp open loop gain is +30 dB and matches the feedback network's -30 dB attenuation (actually the inner loop plot includes the effect of Cn local feedback which may "tilt" the loop gain and give a slighly higher gain intercept frequency)

if you look at the lower plot's -30 dB intercept, which would be ~ the op amp open loop unity gain point you can read off ~ 10 degree phase margin - evidence of the decompensation in action



the Cload test comment I tacked on above was performed with .tran, 1 nS time steps, the datasheet recommended compensation was fully oscillating with 5 nF C load while the T compensated sim's ringing damped out
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Old 1st June 2008, 07:20 PM   #56
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Interesting stuff, there is a 25pF and series R network across the current mirror that was needed for stability. This might complicate things a bit. The fine scale settling time into modest load was also a consideration.
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Old 1st June 2008, 09:35 PM   #57
jcx is online now jcx  United States
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by playing with higher gains (> Av 10) and decompensation I hope many high frequency (>10 MHz) modeling differences can be safely ignored

I'm unconvinced that settling time of MHz bandwidth feedback amplifiers is really relevant to audio reproduction - certainly 2-pole compensations can cause long settling tails but most audio signals will have been 2nd order low pass filterd by microphones and electronics at <100 KHz, usually <20-30 KHz when speaker dynamics are added in

but for high speed instumentaion applications I could believe the "single-pole" output loop response is attractive


Do you have any comment with respect to the Ccomp production spread and how much active device junction C contributes to Voltage sensitivity of the compensation tuning? - I find trimming Cn to 1% "profitable" in sim - but in the real world?
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Old 3rd June 2008, 06:32 PM   #58
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Quote:
Originally posted by jcx
by playing with higher gains (> Av 10) and decompensation I hope many high frequency (>10 MHz) modeling differences can be safely ignored

I'm unconvinced that settling time of MHz bandwidth feedback amplifiers is really relevant to audio reproduction - certainly 2-pole compensations can cause long settling tails but most audio signals will have been 2nd order low pass filterd by microphones and electronics at <100 KHz, usually <20-30 KHz when speaker dynamics are added in

but for high speed instumentaion applications I could believe the "single-pole" output loop response is attractive


Do you have any comment with respect to the Ccomp production spread and how much active device junction C contributes to Voltage sensitivity of the compensation tuning? - I find trimming Cn to 1% "profitable" in sim - but in the real world?
There is probably some sensitivity definately more than 1%. I still would like to make a fully complimentary version.
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Old 6th June 2008, 06:44 AM   #59
lineup is offline lineup  Sweden
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Quote:
Originally posted by ECBLN
@ lineup
Hi, can you send me your multisim file ?
thx
Yeah, of course. I am honored you ask
Send me an Email and you get it. Click My Email button below this post.
By the way, I can send you my simulation of Grundig amplifier, too.
It is a Very Good amplifier! Good MultiSim test-results.
Lots of work done to compensate (many small pF caps).
See attachment, please. / Lineup
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