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Old 6th September 2012, 12:25 AM   #1001
fas42 is offline fas42  Australia
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Originally Posted by Nico Ras View Post
I also believe this is Tom, Frank (I did not call you Fred this time) DF and Terry's observations with their simulations and would appear that both complex impedance and filtering effect of the power supply has some critical effect on the "apparent sound quality" which is of course distortion of some kind or another - probably related to inter-modulation distortion.


Now one final comment, could this be why some speculate that an amplifier with no overall NFB sounds "better" (or one with a non differential input). Or am I just opening another can of worms here. I do believe that we will come to conclusions that will benefit us all.
I knew I would like you in the end, Nico ...

People beating on about the speakers being so terrible with distortion compared to everything else in my experience is a real Furphy (that's Oz for a red herring ...). I've been constantly amazed by how almost miraculously good even very low life speakers sound, if the electronics feeding them are behaving themselves. The quality in sound that makes people jump to attention vs. dismiss the result as ho hum or fatiguing is all about the electronics, almost zero to do with the speaker drivers. In my experience.

Down the track I aim to do some interesting sim's about what happens to the behaviour of a typical power amp when gnfb has to operate in a real, rather than a theoretical world ...

As regards difference in sound with different brands of caps, do note that earlier on I posted a sim showing dramatically different voltage rail glitching depending on the ESR of the caps, something that varies with temperature, the frequency, the age of the thing, the time of day it was manufactured ... it's a can of worms ...

Frank

Last edited by fas42; 6th September 2012 at 12:28 AM.
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Old 6th September 2012, 01:04 AM   #1002
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Fas42,
With your observation that the ESR factor is important and changing with temperature and other factors do you think that besides total capacitance this is one of the specific qualities to look for? So if two capacitors have a graph of ESR as a function and they track similar will we get similar results? And using this specification as a baseline what are we looking for the lowest ESR numbers, or is there a tradeoff between higher or lower values?
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Old 6th September 2012, 02:02 AM   #1003
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Originally Posted by Kindhornman View Post
Fas42,
With your observation that the ESR factor is important and changing with temperature and other factors do you think that besides total capacitance this is one of the specific qualities to look for? So if two capacitors have a graph of ESR as a function and they track similar will we get similar results? And using this specification as a baseline what are we looking for the lowest ESR numbers, or is there a tradeoff between higher or lower values?
All things considered the lower the ESR the better; a simple way to look at it is that the cap is to a large degree the power supply, a type of battery. Which is feeding a load of say 4 ohms through switches, the output active devices. High current flows at the peak power draw then causes a major voltage drop across the ESR, good ol' Ohms Law.

In my own experience it's always worked better when I had multiple caps in parallel to replace a single, large item, this will always reduce the ESR. Sometimes you win(!), ESR of caps reduces as temperature goes up, so, hey, that's one of the reasons maybe why amps sound better after an hour or so from switch on!! And why class A and tube amps do better, hmmm? Downside, the electrolyte inside the caps evaporates faster at higher temps, so life is reduced, and now we lose! The dance continues ...

Frank
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Old 6th September 2012, 03:14 AM   #1004
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Originally Posted by danielwritesbac View Post
Thanks for that post.
Multistrand cable? In an audio amp? I just said the "f" word. That cable has the copper fibers individually coated slightly for corrosion resist. Why do I want 16 bad copies of my signal distorted like a house of mirrors? Does that help tweeters? Apparently, they are selling tone differences, and they must mark up the price or else call it noise? The durability of the botique polypro caps looks acceptable for speaker crossovers, especially for shunt.
Daniel,

Multi-stranded, with each strand insulated, would mean multiple separate parallel conductors, which would make both their net ESR and net ESL lower than those of an individual strand, and hopefully lower than those of a single equivalently-large conductor. It could be significant for a decoupling cap. But if they're axial and large then forget it.

In some cases, something like that might be very helpful when implementing the decoupling caps' layout, where it can be very difficult to get low-enough ESL (and ESR), i.e. short-enough connection lengths, without using multiple separate parallel conductors (typically one pair for each decoupling cap, with multiple smaller parallel caps being used in place of one larger one).

Also, I still say that the power and ground rails should be implemented using multiple separate parallel pairs of conductors, that stay separate all the way from the rectifier outputs to the load, with a separate capacitance for each end of each pair of power/ground conductors.

The truly ambitious would experiment with the use of a separate set of those multiple pairs for each active power device. Shielded cables with multiple twisted pairs inside come to mind. (Or, implement with true multi-layer PCBs. But be careful to use multiple separate widely-spaced points to connect each power and ground plane to the PSU, with a separate conductor (to the PSU) for each feed point [because mutual inductance has to be avoided, to get the ESL to "divide down" exactly like the total R of parallel resistors does].)

Theoretically, we could make the power supply impedance, AS SEEN BY the active power devices, as low as we wanted, just by using enough parallel pairs of conductors for power and ground. (If we used enough, maybe they could also be the heat sinks. <grin>)

Tom
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Old 6th September 2012, 03:38 AM   #1005
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Originally Posted by gootee View Post
The truly ambitious would experiment with the use of a separate set of those multiple pairs for each active power device. Shielded cables with multiple twisted pairs inside come to mind. (Or, implement with true multi-layer PCBs. But be careful to use multiple separate widely-spaced points to connect each power and ground plane to the PSU, with a separate conductor (to the PSU) for each feed point [because mutual inductance has to be avoided, to get the ESL to "divide down" exactly like the total R of parallel resistors does].)

Theoretically, we could make the power supply impedance, AS SEEN BY the active power devices, as low as we wanted, just by using enough parallel pairs of conductors for power and ground. (If we used enough, maybe they could also be the heat sinks. <grin>)

Tom
I went to a great deal of trouble using much of these techniques for my version of the classic National gainclone: over sized transformer, huge array of caps, separate power planes, regulation. It was, is, virtually all power supply, the amp itself was a tiny, tiny part of the assembly.

And it worked, had no trouble hitting the bump stops without showing signs of stress. It had so much effective energy reserve that I could pull the power plug out of the wall while playing at a moderate volume level, and nothing would alter for many minutes, depending on what was playing, no change in tonality, etc.

Frank
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Old 6th September 2012, 05:13 AM   #1006
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Here is an example of the power supply distortion that I am using to determine the "cutoff" point for the "minimum" required capacitance.

The example setup is not extremly important, for this example, but for the sake of completeness here is its description: It has two 500-VA-each transformers acting as center-tapped secondaries of a simulated 1000 VA-rated transformer, with a rated voltage of 44-0-44 VCT RMS, powering a rectifier bridge, reservoir capacitors, and the amplifier previously shown, set up to produce 100 Watts into the single 8-Ohm load resistor, with 25 Hz square wave input and gain set to produce +/-40-Volt peaks. (That actually gives 100 Watts RMS, per power rail, but not at the same time. So it makes a total of 200 W RMS if both polarities of the square wave are considered, but would make 100 Watts RMS, total, for a sine wave of the same peak amplitude.) Anyway, the 1000VA 44-0-44 transformer should be enough that the transformer ratings will not prematurely distort the output signal (i.e. it should not require atypically-large reservoir capacitances).

Image 1 shows the measured parameters for reservoir capacitors (one per rail) of 1000uF to 2500 uF each, stepping 500 uF each time, with the sequence of colors being (except fpr the top two plot panes): 1. bright-green/yellow, 2. blue, 3. red, 4. light-green. As can be easily seen, the output signal plot (second from bottom)and the calculated error (bottom plot), have large spikes, or glitches. One such set of error pulses is shown magnified, in the next plot.

Image 2 shows a zoomed-in view of one set of the spikes. It appears that there are spikes for 1000, 1500, and 2000 uF, but none for 2500 uF. So the capacitance was then stepped from 2000 uF to 2500 uF, with 100 uF per step.

Image 3 shows a zoomed-in area that had a larger remaining error than the area shown in the previous plots. It looks like 2200 uF is still distorted but 2300 uF might be OK.

Image 4 shows the same area as plot 3, but zoomed-in much more. Now we can see that 2300 uF DOES still have some of the distortion. It's only about 0.5 mV, out of 40 Volts. It might not be audible, but one purpose of this study is to find out where (at what capacitance level) this "obvious" type of PSU-induced distortion goes away, "completely".

So, we could be overly-ambitious and try to find out where, betweem 2300 and 2400 uF, the distortion disappears.

Image 5 has the graphs for the sweeps from 2300 to 2400 uF, with 20 uF per step. The distortion is no longer obvious, with the plots unmagnified. But we now know exactly where to look...

Image 6 shows a partially-magnified set of plots, so we can see the "context" of the remaining error glitch, which is just to the left of the 370 ms line.

Image 7 shows the glitch with additional magnification. Now we can see that 2300 uF still gives the glitch, but 2320 uF looks good. Bingo. (It's only doing an excursion of about 700 uV. But for 20 uF more, it can be gone.)

Looking only at the "flat" tops and bottoms of the square waves, there is still another type of distortion, which is shaped like the voltage rail voltage, and which is reduced as capacitance is added. It looks like less than +/-10mV, in the plots, with 10 mV being 0.025 % of 40 Volts.

(And, of course, without decoupling capacitances placed close-enough to the points of load, there are still error impulses coinciding with the rise and fall of each square wave.)

Tom
Attached Images
File Type: jpg PSUDistortion1.jpg (158.0 KB, 441 views)
File Type: jpg PSUDistortion2.jpg (120.8 KB, 425 views)
File Type: jpg PSUDistortion3.jpg (125.9 KB, 411 views)
File Type: jpg PSUDistortion4.jpg (129.4 KB, 397 views)
File Type: jpg PSUDistortion5.jpg (129.4 KB, 386 views)
File Type: jpg PSUDistortion6.jpg (116.5 KB, 33 views)
File Type: jpg PSUDistortion7.jpg (117.9 KB, 43 views)

Last edited by gootee; 6th September 2012 at 05:41 AM.
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Old 6th September 2012, 05:27 AM   #1007
gootee is offline gootee  United States
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Originally Posted by fas42 View Post
I went to a great deal of trouble using much of these techniques for my version of the classic National gainclone: over sized transformer, huge array of caps, separate power planes, regulation. It was, is, virtually all power supply, the amp itself was a tiny, tiny part of the assembly.

And it worked, had no trouble hitting the bump stops without showing signs of stress. It had so much effective energy reserve that I could pull the power plug out of the wall while playing at a moderate volume level, and nothing would alter for many minutes, depending on what was playing, no change in tonality, etc.

Frank
You are my hero, Frank!
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Old 6th September 2012, 09:59 AM   #1008
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Originally Posted by gootee View Post
Theoretically, we could make the power supply impedance, AS SEEN BY the active power devices, as low as we wanted, just by using enough parallel pairs of conductors for power and ground.
Tom, I'm trying to visualize that without epic loops with hot/unstable devices but didn't manage. Have you got a handy sketch of what the concept might look like? You made it seem so interesting and I'm sorry that I can't visualize it.
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Last edited by danielwritesbac; 6th September 2012 at 10:26 AM.
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Old 6th September 2012, 10:31 AM   #1009
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Tom, you and Frank both rock!

As far as parasitics are concerned:

stray inductance and ESR can conspire to make a "DC bus" much, much worse than expected. that aspect of this thread isnt about making super-duper circuitry, its about using standard RF engineering practices to stop PCB layout & wiring from ruining otherwise good designs.

Parallel multiple smaller axial electrolytics to minimise ESR & ESL and maximise lifetime (caps, like every other component, can only dissipate heat through their surfaces. to minimise temperature rise many small caps are better than few large caps (its that old surface-area-to-volume ratio again)). Not only that but variations of individual caps are "smoothed out" by the parallel network - if the ESR rises sharply in one cap, thats a real problem if its the only one; if its one of say 10 in parallel it matters a whole lot less.

And once you have decided on a bunch of caps in parallel, use a double-sided PCB (handmade or proper) and have one entire side as the 0V plane, with NO SLOTS.

I think a C-R-C filter is a good idea - place the rectifiers and main cap bank as close as possible to the xfmr, but still tightly twist/plait the interconnect. Then an R (if desired) can be placed in series with the amplifier interconnect (which should also be tightly twisted/plaitted) and the second cap bank (same excellent layout) should be placed at the amplifier itself (I would be tempted to thread a few turns of the amp psu interconnect braid through a high-perm ferrite toroid to make a CM choke).

this has the advantage of decoupling (har har) the rectifier and amplifier currents, making cap lifetime calcs much easier.

Placing a fuse in the amplifier supply rails is a free source of "R" - but make sure the fuse is between the supply and the amp cap bank, NOT between the caps and the driver transistors - the fuse can never protect the silicon (its there to stop fires), and all it does if placed between the caps & transistors is increase the interconnect inductance.

I've been looking at the SYMEF layout, and figuring out a nicer way to do it. conclusion: good layout is not easy to do - I'm not surprised so many amp layouts are so bad. I'm getting there (4 layers is OK, 2 layers is much harder), but I really dont like the air-core output inductor.
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Old 6th September 2012, 10:41 AM   #1010
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Daniel:

make a 100,000uF cap bank with 100 x 1000uF capacitors in parallel. arrange them in a 10x10 array, with even rows offset (not for packing density, but to ensure air flow around all the caps - no straight "corridors" for air to flow thru).

do this on a 1mm thick FR4 PCB. Make the entire top layer 0V, and the entire bottom layer V+. It'll be about 120mm square. stick a rectifier in the middle of the top edge.

then place the +ve output transistors at the bottom edge, again centered. congratulations, you now have a stupidly low inductance interconnect - its about 10nH/m inductance, so about 1.3nH total inductance. this is << the caps internal ESL (around 10-20nH) so they will share nicely.

obviously the width of the cap bank should correlate stringly with the width of the power stage. and you might want a cap bank for the negative supply. but you get the general idea.....
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